100 Commits
Author SHA1 Message Date
Adrian BöckenkampandGerrit Code Review 25ea559e59 Merge changes I7f48460e,I1f7fbdaf
* changes:
  gem5 startup script: revisited fs.py to get rid of ARM linux images
  doc/how-to-build: dependency libmysqlclient-dev
2013-08-21 13:35:43 +02:00
Adrian BöckenkampandGerrit Code Review 5e238cc3f9 gem5 startup script: revisited fs.py to get rid of ARM linux images
In former versions, the aforementioned image was 'required' to run
gem5 although it wasn't actually used at all. With the new python
script fail_fs.py, it suffices to start gem5 on a target foo.elf by
simply typing $ ../scripts/run-gem5.sh path/to/target/foo.elf

Change-Id: I7f48460e50d48d55fe22f2381e2ae8aec8510233
2013-08-21 12:05:16 +02:00
Adrian BöckenkampandGerrit Code Review e006c4da0a Merge "sal/arm: compiler warning fixed (see -Wdelete-non-virtual-dtor)" 2013-08-21 11:49:29 +02:00
Adrian BöckenkampandHorst Schirmeier c0121b1a9b doc/how-to-build: dependency libmysqlclient-dev
libmysqlclient-dev (or libmariadbclient-dev) is needed to build Fail*.
A running MySQL/MariaDB server to talk to is needed for the
fault-space pruning tools and the DatabaseCampaign, too, but that's a
runtime dependency.

Change-Id: I1f7fbdaf20b49370039e8d27a07a8785e0f052b5
2013-08-21 11:16:47 +02:00
Adrian Böckenkamp 1c55923e55 sal/arm: compiler warning fixed (see -Wdelete-non-virtual-dtor)
This commit introduces a virtual dtor in the ArmCPUState class to
prevent the compiler from producing the following warning:
 "deleting object of polymorphic class type 'fail::Gem5ArmCPU' which
  has non-virtual destructor might cause undefined behaviour"

Change-Id: I5029662064e72ae87a9f0e36aeaa309e4cb2291b
2013-07-31 18:07:55 +02:00
Adrian Böckenkamp 618fdb8e77 gem5 buildsys: compiler flag fixed due to newer gcc version
(Debian 7.1 comes with gcc 4.7.2) However, we are faking a gcc v4.4.5
but the gem5 build system only adds the '-Wno-unused-but-set-variable'
flag in case of a gcc >= v4.6. Now, this flag will always be appended.
(Older gcc versions should ignore the flag or emit a warning but will
continue to run.)

Change-Id: I7021e08019951375c7e8b56d0f875191f904971d
2013-07-31 17:08:14 +02:00
Adrian BöckenkampandGerrit Code Review 593e703807 Merge "cmake: gem5-related build system updates" 2013-07-04 15:08:15 +02:00
Adrian Böckenkamp aecb353087 cmake: gem5-related build system updates
The build system now allows incremental gem5 builds. Unfortunately,
the current solution always requires re-linking the executable.
Without the enforcement of re-linking, the fail code will be rebuilt
but not linked into gem5.

The number of cores for building gem5 is derived from /proc/cpuinfo.
As before, only the gem5.debug configuration is supported.

Change-Id: Ib13b15d1ecd62196eb251e0fd00953f4eb052feb
2013-07-04 15:01:22 +02:00
Adrian BöckenkampandGerrit Code Review eeeeb92ee7 Merge "core/sal: dependency checks moved to listener classes" 2013-06-05 15:36:33 +02:00
Adrian Böckenkamp 3e7da9b09a core/sal: dependency checks moved to listener classes
It is no longer required (and recommended) to write a dependency
check (using conditional compilation) in the experiment code. Instead,
the Fail code performs these checks itself. If an experiment is
compiled without having the required configuration flags set to
enabled, the compiler emits an error. This is because the constructors
of unused listener classes are declared as protected. (Note that
this works only because the Fail code does not create any listeners.)

In a next step, one should remove all the dependency guards in the
existing experiments (not needed anymore).

Change-Id: I1331813a432a752322d510b4102da53ff53294f0
2013-06-05 15:30:05 +02:00
Adrian Böckenkamp 6d8b3331d8 doxygen: doc generation fixed
Doxygen skips undesired directories and files now. In addition, the
documentation of the "fail" namespace has been fixed. Note that there
are still several warnings (due to incomplete documentations) in the
Doxygen output.

Change-Id: Idad4f1ecff453765b307fa40a5c1cebc0c2ce2bb
2013-05-29 13:34:12 +02:00
Adrian Böckenkamp d9ba5e24ad gem5: more info about how to use and how to build
The recent information in how-to-use.txt and how-to-build.txt were
outdated.

Change-Id: I4e6536a0b56370717d6a09f4012862d300526313
2013-05-17 13:29:21 +02:00
Adrian Böckenkamp f92557c2c2 gem5: codebase patched to compile with ag++
This changes allows us to compile the gem5 simulator with ag++. It
was tested with ag++ v0.8, built Apr 18 2013. Most of the changes
are preprocessor directives like #ifndef __puma which have been
inserted into the gem5 code. Unfortunately, a python script and a
SWIG input file have been patched, too.
Additionally, the CMake file has been updated. A single call to
"make" now invokes the ag++ (instead of the g++) compiler front
end. The new CMake target "gem5-allclean" should be used to clean
the current project when building FailGem5. In addition to cleaning
the Fail build directory, it also invokes "scons -c" in the gem5
build directory; that is, gem5 is cleaned as well.

Change-Id: I20a92f025f34f626b81e30f2c873baeba189f83b
2013-05-16 15:35:28 +02:00
Adrian Böckenkamp 95892e9688 Merge branch 'master' of ssh://vamos.informatik.uni-erlangen.de:29418/fail 2013-05-07 15:06:01 +02:00
Adrian BöckenkampandGerrit Code Review 515eb9973b Fail* CPUState: set/getRegisterContent() uses "const Register*" as 1st param
The first parameter (Register* reg) is only used as input (const-correctness).

Change-Id: I5a75a9f7378913e491a8a22872f51a385e910af6
2013-05-07 14:48:36 +02:00
Adrian BöckenkampandGerrit Code Review 72c9ba6363 Added abo-simple-arm experiment code
It is a simple and short experiment that performs single stepping
through the target. It is designed to be used with gem5 (+ ARM).

Change-Id: Id48b2b087a3650bd0298454ff168c0dbdaaae0c8
2013-05-07 14:46:19 +02:00
Adrian BöckenkampandGerrit Code Review 924b40615d gem5: revisited register implementation
The previous implementation wasn't in a working state because
the register content retrieval was buggy. (For example, RT_FP
does *not* denote a "floating point" register. Instead, it is
the frame pointer!)

Change-Id: I31fd80d374c945adaf35b47958d6437a8e2d48c3
2013-05-07 14:45:54 +02:00
Adrian BöckenkampandGerrit Code Review 619f62b09f gem5: added getMnemonic() (requires breakpoints)
Change-Id: I5a2862a0ad3c3d506189a6196682e227205ebe09
2013-05-07 14:42:59 +02:00
Adrian BöckenkampandGerrit Code Review 578e7defd0 gem5: compiles again
Change-Id: Ia95f64953af86003c4be4cbeb01a927d6638f1be
2013-05-07 14:41:52 +02:00
Adrian BöckenkampandGerrit Code Review 699f14cf0f Merge "gem5: revisited breakpoint implementation" 2013-05-07 13:06:04 +02:00
Adrian Böckenkamp 33c0584dda gem5: revisited breakpoint implementation
Now, the gem5 implementation equals the Bochs variant. Note that it's
*not* necessary to enable CONFIG_EVENTS_BREAKPOINTS_RANGE in order to
use range breakpoints.
In addition, gem5 distinguishes between macro- and microops. With the
new implementation, onBreakpoint() is only called when a macroop
changes.

Change-Id: Ib86d1802fc70c20d22ca1a1ece0e8d1221b2e7db
2013-04-29 13:23:58 +02:00
Adrian BöckenkampandChristian Dietrich 11d9690a67 Typos in BochsController.hpp fixed
Change-Id: Ib94d63707fdeb3e0dc77cccd3ffde04df25329c2
2013-04-28 12:51:33 +02:00
Adrian Böckenkamp 628c1b6997 Added abo-simple-arm experiment code
It is a simple and short experiment that performs single stepping
through the target. It is designed to be used with gem5 (+ ARM).

Change-Id: Id48b2b087a3650bd0298454ff168c0dbdaaae0c8
2013-04-24 14:26:11 +02:00
Adrian Böckenkamp a43da33fd0 Revisited register implementation in gem5
Change-Id: I31fd80d374c945adaf35b47958d6437a8e2d48c3
2013-04-24 14:16:25 +02:00
Adrian Böckenkamp 896d6cc4c1 gem5: added getMnemonic() (requires breakpoints)
Change-Id: I5a2862a0ad3c3d506189a6196682e227205ebe09
2013-04-24 14:14:15 +02:00
Adrian Böckenkamp 1c70ed2334 Make it compile again (with gem5 + ARM)
Change-Id: Ia95f64953af86003c4be4cbeb01a927d6638f1be
2013-04-24 13:19:40 +02:00
Adrian Böckenkamp a3cafbd78b Revisited breakpoint implementation of gem5.
Now, the gem5 implementation equals the Bochs variant. Note that its
necessary to enable CONFIG_EVENTS_BREAKPOINTS_RANGE in order to use
range breakpoints.
In addition, gem5 distinguishes between macro- and microops. With the
new implemenation, onBreakpoint is only called when a macroop changes.

Change-Id: Ib86d1802fc70c20d22ca1a1ece0e8d1221b2e7db
2013-04-24 13:06:44 +02:00
Adrian Böckenkamp f364024cba Typos in BochsController.hpp fixed
Change-Id: Ib94d63707fdeb3e0dc77cccd3ffde04df25329c2
2013-04-23 14:34:27 +02:00
Adrian BöckenkampandGerrit Code Review 2910e8462e Merge "Removed OVP-related (source) files/code (backend discarded)." 2013-04-23 14:27:02 +02:00
Adrian Böckenkamp 03bcf7bfc8 Removed OVP-related (source) files/code (backend discarded).
Change-Id: Ibf8065d9fe760640e5744896b764f9ebb6d2fa69
2013-04-10 15:16:46 +02:00
Adrian BöckenkampandGerrit Code Review 6b5728ece1 Merge "gem5 build system improved" 2013-04-09 14:16:12 +02:00
Adrian Böckenkamp 08febe5819 gem5 build system improved
Encapsulated gem5-specific code into wrapper functions to separate the
build process (Fail: CMake, gem5: scons). Added some gem5-related FIXMEs.

Another CMake related FIXME added. +some cosmetics.

Change-Id: Id84b480127b1f13aed6a0ee97f3583f410d531c5
2013-04-08 17:57:06 +02:00
adrian 7605dfa4c4 wmo-gem5 bugfix: use weather-monitor-gem5 as experiment name in CMakeFile
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2087 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-02-14 14:45:34 +00:00
adrian bf9e111b9f no need for a separate fillRegisterList() method(only called once)
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2086 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-02-14 14:45:30 +00:00
adrian e81517645f doc for X86CPUState added, FIXME removed
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2085 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-02-14 14:45:26 +00:00
adrian 3cc40e62c7 A few CPUState-related methods should be const (getter)
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2084 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-02-14 14:45:22 +00:00
adrian accfba8237 coding-style++, gem5 code doc added
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2083 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-02-14 14:45:18 +00:00
adrian c8a9039f36 #error msg for gem5 + x85 added (not supported yet)
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2082 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-02-14 14:45:13 +00:00
adrian 4d34a7375a class-diagram: major updates
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2078 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-02-07 14:19:06 +00:00
adrian 7f587d461c ArmArchitecture::fillRegisterList(): set textual register name appropriately
For some reasons, the compiler cannot find a matching Register::setName(const std::string&) although it is implemented in sal/Register.cc. The work around fixes this issue.

git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2077 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-02-07 14:17:49 +00:00
adrian 0303f00d72 ElfReader::getSectionSize(): return type of definition should equal the return type of the declaration (i.e., guest_address_t)
This caused a compilation error on ARM (+gem5).

git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2076 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-02-07 11:54:27 +00:00
adrian f96f4dd360 typo-fix
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2075 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-02-07 10:43:07 +00:00
adrian b996617a97 ecos_kernel_test: improved dependency check
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2074 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-02-07 10:43:03 +00:00
adrian 5f2364e1a2 ecos_kernel_test: updates due to architecture changes (ElfReader still NOT working properly)
At the moment, the experiment only works with a hard-coded address for the _stext symbol because the ElfReader cannot extract the symbol's address from the elf-binary. The experiment has been tested locally with PREREQUISITES = 1 and PREREQUISITES = 0. In the latter case, the test only considered the client/server communication, i.e., no FI has been performed at all (NOT tested yet).

git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2066 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-02-06 15:39:57 +00:00
adrian d9808c0fca DEBUG flag in BochsController not needed anymore
It is a remnant of former times. ;-)

git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2065 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-02-06 15:39:54 +00:00
adrian 5c4b132550 ~SimulatorController: do not free ConcreteCPU object ptr in the base class
In fact, delete should be called in the destructor of each derived class (BochsController and Gem5Controller at the moment).

Additionally, this is the reason why ~SimulatorController is declared as virtual.

git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2064 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-02-06 15:39:50 +00:00
adrian 552a5fb4ac coding-style++, comments++, FIXMEs++
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2063 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-02-06 15:39:46 +00:00
adrian 38b7064189 Make CPUArchitecure::addRegister protected: no need to modify the register config in an experiment
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2062 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-02-06 15:39:41 +00:00
adrian 582c8617d3 CPUArchitecture: iterator added to allow iterating over all registers
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2036 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-01-31 12:19:02 +00:00
adrian e76b7b989b fault-coverage fix due to arch. changes
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2035 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-01-31 12:18:58 +00:00
adrian ec54a1481c fault-coverage: everything is logged to std::cout, now
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2034 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-01-31 12:18:54 +00:00
adrian bede34d0c9 fault-coverage: intro comment translated
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2033 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-01-31 12:18:51 +00:00
adrian cb429fddb2 typos fixed.
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2032 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-01-31 12:18:47 +00:00
adrian 27128f29ac fire-interrupt fix: no more dbgEnableInstrPtrOutput()
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2031 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-01-31 12:18:44 +00:00
adrian 325844876b mh-test-campaign fix due to arch changes
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2030 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-01-31 12:18:40 +00:00
adrian f5a1213ce1 checksum-oostubs-fix due to arch. changes (tested)
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2029 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-01-31 12:18:37 +00:00
adrian 03138b388a nanojpeg-fix due to recent architecure changes (compiled but not tested)
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2028 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-01-31 12:18:32 +00:00
adrian 55f5d6a051 weather-monitor: changes due to new Fail architecure
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2021 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-01-24 13:26:26 +00:00
adrian 58c5ef98f4 typo-fix: ExperimentData.hpp
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2020 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-01-24 13:26:22 +00:00
adrian bcb48344ea revert "bugfix: typo in CMakeLists.txt (CLIENT_JOB_LIMIT -> CLIENT_JOB_LIMIT_SEC)"
This reverts commit 270d37e929e584786fc40a336a9f73962182648f.

git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2018 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-01-24 11:21:16 +00:00
adrian ed3e81d290 bugfix: typo in CMakeLists.txt (CLIENT_JOB_LIMIT -> CLIENT_JOB_LIMIT_SEC)
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2017 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-01-24 11:05:33 +00:00
adrian ce9db1fdb3 hsc-simple: experiment should not terminate because we want to see Bochs' output (3 * 3 = 666 :-))
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2016 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-01-24 10:00:49 +00:00
adrian 1ce2cd96be regression-test fixes: use new register access syntax
The golden-run image of the regression test needs to be updated in order to cope with the bugfix for breakpoint events in rep-instructions.

git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2011 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-01-17 13:41:27 +00:00
adrian 125914a305 BochsRegister.hpp and BochsRegisterIDs.hpp not needed anymore
The includes of these headers have already been removed from the experiments. In the current code, the content of the header BochsRegister.hpp is rather simply copied to x86/Architecture.hpp. It is therefore necessary to revisit the code soon (especially the FIXME related to register IDs).

Another problem is that there is no generalization of register IDs. Thus, all experiments are currently specific to a concrete architecture (which is not desired).

git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2010 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-01-17 13:41:23 +00:00
adrian 03b4356598 Bugfix: Let Bochs' trigger breakpoint events even in case of rep-instructions
This reverts the solution of a former commit (see git hash e1f6601d8494bcb002e89543a9334e053f0e69d3). All additional changes proposed in that commit have been deleted and the major work is now done by the aspect header BreakRepeatInstr.ah: It ensures the condition in the methods repeat() and repeat_ZF() if (BX_CPU_THIS_PTR async_event) ... to be always true which causes Bochs to leave these methods immediately. This, in turn, involves a call to defineCPULoopJointPoint(), yielding a breakpoint event in Fail.

git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2009 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-01-17 13:41:19 +00:00
adrian 0ba62aea8f Both performance aspects need to respect the argument order of their target methods (pointcuts)
Additionaly, the CPU object is passed to the Event object construction in ordner to set the trigger CPU ptr (in PerfVector{Watchpoints,Breakpoints}::gather()) properly.

git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2008 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-01-17 13:41:15 +00:00
adrian edf44aec28 Bugfixes for aspect headers due to architecure-related changes.
Now, each aspect calls it's corresponding event headler by providing the new CPU object pointer as well.

git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2007 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-01-17 13:41:11 +00:00
adrian 214bb36b47 onIOPort needs to have a ConcreteCPU argument as well; detectCPU() added
detectCPU() allows us to easily retrieve the current Fail-CPU object which is a regular use case in the aspect headers, now. (Another solution would be a slice in the Bochs CPU class which inserts a reference to the Fail CPU object. Maybe we 'll implement this at a later point.)

git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2006 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-01-17 13:41:07 +00:00
adrian d3cf2359a4 FIXMEs and comments updated due to last architecture-related changes
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2005 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2013-01-17 13:41:03 +00:00
adrian f8aa1237e9 Make FailBochs compile again (after changes in r1966).
For now, only breakpoints are working. Other event sources need to be revised, too.

git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1981 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-12-12 13:08:43 +00:00
adrian 2010d4c385 Created default x86 CPU interface classes.
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1980 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-12-12 13:08:39 +00:00
adrian d019f64bf5 Export Bochs 64 bit ability (if enabled).
This is required to add the architecture-dependent registers.

git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1979 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-12-12 13:08:35 +00:00
adrian bc0da74104 ArmArchitecture: improve destructor speed by calling clear() instead of erase().
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1978 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-12-12 13:08:32 +00:00
adrian 692172a164 ArmArchitecture: set ARM register names (textual ddescription) as well.
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1977 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-12-12 13:08:28 +00:00
adrian d3ccc75269 ArmCPUState: no need to repeat abstract method declarations
(...if they have already been defined in the base class).

git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1976 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-12-12 13:08:24 +00:00
adrian 9f53d3348b SimulatorController: no need for return type bool of addCPU().
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1975 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-12-12 13:08:21 +00:00
adrian 25f75b299c coding style fixed, some FIXMEs and comments added.
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1974 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-12-12 13:08:17 +00:00
adrian fb4ba0b104 hsc-simple: modifications due to architecure changes in r1966.
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1973 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-12-12 13:08:12 +00:00
adrian 4189871920 coding-style++
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1972 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-12-11 15:14:34 +00:00
adrian 2b36678737 Separated Architecture and CPUState classes for ARM/Gem5 (*Architecture will be used in the campaign).
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1969 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-12-05 13:05:24 +00:00
adrian b981fdcfea coding style++
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1968 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-12-05 12:40:34 +00:00
adrian 35753cd075 coding style++, some TODOs added.
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1967 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-12-05 12:27:17 +00:00
adrian bbf7731aa2 fast-watchpoints: implementation finished (and tested).
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1900 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-11-08 13:36:08 +00:00
adrian ddbab2e903 build-system: separated fast-breakpoints, added fast-watchpoints.
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1899 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-11-08 13:35:22 +00:00
adrian 4a6b576b18 fast-breakpoints: created template class DefPerfVector, realizing the buffer interface. Modified PerfVectorBreakpoints appropriately.
This is useful to reuse the DefPerfVector class for fast-watchpoints, too.

git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1898 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-11-08 13:18:40 +00:00
adrian 148b0bb483 fast-breakpoints: work even if fast-watchpoints are enabled (TODO removed).
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1897 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-11-08 13:07:02 +00:00
adrian 5648093ffe fast-breakpoints: use explicit namespace qualifier in aspect header.
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1896 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-11-08 13:05:05 +00:00
adrian e337fef205 perf-test: further results added
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1895 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-11-08 12:59:43 +00:00
adrian 2eb18c81ac perf-test: code improved.
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1894 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-11-08 12:59:16 +00:00
adrian 0b8710872b Removed BochController debug stuff. Merged: BochsController::onBreakpoint -> SimCon::onBreakpoint.
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1883 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-11-06 11:40:05 +00:00
adrian 4ec51b003a bugfix: WallclockTimer::operator<< must be inlined to prevent multiple defs.
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1869 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-10-31 12:42:48 +00:00
adrian dd17034fce WallclockTimer: coding style unifications.
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1867 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-10-30 12:15:26 +00:00
adrian 34d89000cf ecos_kernel_test: simplification (no need to call clearListeners() here).
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1843 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-10-25 15:52:55 +00:00
adrian e8f715f8af comment-fix (not comprehensible this way)
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1842 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-10-25 15:51:20 +00:00
adrian 6b1f457662 bugfix: onDeletion() cannot be called on listeners in the fire-list. (+ simplified makeActive().)
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1841 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-10-25 15:49:25 +00:00
adrian 8588617a86 ListenerManager bugfix (segfault): clear fire-list when clearListener() is called (this revealed a bug in reboot() which needs to be fixed too).
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1817 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-10-24 13:42:05 +00:00
adrian ab4cdcc6e0 perf-test: best- and worst-case tests for evaluating fast-breakpoint performance (+ results).
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1745 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-10-16 13:07:11 +00:00
adrian 15def480d9 warning-fix in release mode (var not initialized).
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1731 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-10-09 11:10:29 +00:00
adrian 171d178309 SimCon interface update: save returns a boolean, now (+ redundant virtual keywords removed).
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1724 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-10-05 12:12:56 +00:00
adrian 0c3568dc2f CoroutineManager: comment fix (deprecated).
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1722 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-10-05 11:56:39 +00:00