christoph/fail
1
Fork 0
Code Releases Activity

Make CPUArchitecure::addRegister protected: no need to modify the register config in an experiment

Browse Source 
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2062 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
This commit is contained in:
adrian
2013-02-06 15:39:41 +00:00
parent 8ce25257c3
commit 38b7064189
4 changed files with 14 additions and 15 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/core/sal/CPU.cc
View File

@ -2,7 +2,7 @@
namespace fail {
void CPUArchitecture::addRegister(Register* reg)
void CPUArchitecture::m_addRegister(Register* reg)
{
assert(!reg->isAssigned() && "FATAL ERROR: The register is already assigned!");
m_Registers.push_back(reg);

15
src/core/sal/CPU.hpp
View File

@ -43,14 +43,6 @@ public:
* @return the number of sets
*/
size_t registerSubsetCount() const { return m_RegisterSubsets.size(); }
/**
* Adds a new register to this set. The register object needs to be
* typed (see Register::getType).
* @param reg a pointer to the register object to be added
* @see getType()
*/
void addRegister(Register* reg);
// FIXME: make this protected? no need to modify the register config at runtime...
/**
* Retrieves the \a i-th register.
* @return a pointer to the \a i-th register; if \a i is invalid, an
@ -74,6 +66,13 @@ public:
protected:
std::vector<Register*> m_Registers;
std::vector<UniformRegisterSet*> m_RegisterSubsets;
/**
* Adds a new register to this set. The register object needs to be
* typed (see Register::getType).
* @param reg a pointer to the register object to be added
* @see getType()
*/
void m_addRegister(Register* reg);
};
} // end-of-namespace: fail

4
src/core/sal/arm/Architecture.cc
View File

@ -21,13 +21,13 @@ void ArmArchitecture::fillRegisterList()
// FIXME This doesn't work because no matching setName is found.
// Not sure why this happens.
//reg->setName(sstr.str());
addRegister(reg);
m_addRegister(reg);
}
// Instruction Pointer
Register *reg = new Register(RI_IP, RT_IP, 32);
reg->setName("IP");
addRegister(reg);
m_addRegister(reg);
}
ArmArchitecture::~ArmArchitecture()

8
src/core/sal/x86/Architecture.cc
View File

@ -15,7 +15,7 @@ X86Architecture::X86Architecture()
for (unsigned short i = 0; i < 16; i++) {
Register* pReg = new Register(i, RT_GP, 64);
pReg->setName(names[i]);
addRegister(pReg);
m_addRegister(pReg);
}
#else
// -- 32 bit register --
@ -23,7 +23,7 @@ X86Architecture::X86Architecture()
for (unsigned short i = 0; i < 8; i++) {
Register* pReg = new Register(i, RT_GP, 32);
pReg->setName(names[i]);
addRegister(pReg);
m_addRegister(pReg);
}
#endif // SIM_SUPPORT_64
// -------------------------------------
@ -35,12 +35,12 @@ X86Architecture::X86Architecture()
Register* pPCReg = new Register(RID_PC, RT_IP, 32);
pPCReg->setName("EIP");
#endif // SIM_SUPPORT_64
addRegister(pPCReg);
m_addRegister(pPCReg);
// -------------------------------------
// Add the status register (EFLAGS):
Register* pFlagReg = new Register(RID_FLAGS, RT_ST, 32);
pFlagReg->setName("EFLAGS");
addRegister(pFlagReg);
m_addRegister(pFlagReg);
}
X86Architecture::~X86Architecture()