Both performance aspects need to respect the argument order of their target methods (pointcuts)

Additionaly, the CPU object is passed to the Event object construction in ordner to set the trigger CPU ptr (in PerfVector{Watchpoints,Breakpoints}::gather()) properly.

git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2008 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
This commit is contained in:
adrian
2013-01-17 13:41:15 +00:00
parent edf44aec28
commit 0ba62aea8f
4 changed files with 8 additions and 5 deletions

View File

@ -15,6 +15,7 @@ ResultSet& PerfVectorBreakpoints::gather(BPEvent* pData)
if (pLi->isMatching(pData)) {
// Update trigger IPtr:
pLi->setTriggerInstructionPointer(pData->getTriggerInstructionPointer());
pLi->setTriggerCPU(pData->getTriggerCPU());
res.add(*it);
}
}

View File

@ -60,7 +60,7 @@ aspect FastBreakpoints {
// Note: "BPListener" is an abstract class anyway.
fail::ListenerManager& ref = tjp->target()->m_LstList;
fail::BPEvent tmp(*(tjp->arg<0>()), *(tjp->arg<1>()));
fail::BPEvent tmp(*(tjp->arg<1>()), *(tjp->arg<2>()), *(tjp->arg<0>()));
// Check for matching BPSingleListeners:
fail::ResultSet& res1 = ref.getSingleListeners().gather(&tmp);

View File

@ -56,10 +56,11 @@ aspect FastWatchpoints {
// Note: "BPListener" is an abstract class anyway.
fail::ListenerManager& ref = tjp->target()->m_LstList;
#define TJPARG(i) *(tjp->arg<i>())
fail::MemAccessEvent tmp(TJPARG(0), TJPARG(1), TJPARG(3),
TJPARG(2) ? fail::MemAccessEvent::MEM_WRITE : fail::MemAccessEvent::MEM_READ);
#undef TJPARG
#define ARG(i) *(tjp->arg<i>())
fail::MemAccessEvent tmp(ARG(1), ARG(2), ARG(4),
ARG(3) ? fail::MemAccessEvent::MEM_WRITE : fail::MemAccessEvent::MEM_READ,
ARG(0));
#undef ARG
// Check for matching MemAccessListener:
fail::ResultSet& res = ref.getMemoryListeners().gather(&tmp);

View File

@ -19,6 +19,7 @@ ResultSet& PerfVectorWatchpoints::gather(MemAccessEvent* pData)
pmal->setTriggerAddress(pData->getTriggerAddress());
pmal->setTriggerWidth(pData->getTriggerWidth());
pmal->setTriggerAccessType(pData->getTriggerAccessType());
pmal->setTriggerCPU(pData->getTriggerCPU());
res.add(*it);
}
}