27128f29ac
fire-interrupt fix: no more dbgEnableInstrPtrOutput()
adrian2013-01-31 12:18:44 +00:00
325844876b
mh-test-campaign fix due to arch changes
adrian2013-01-31 12:18:40 +00:00
f5a1213ce1
checksum-oostubs-fix due to arch. changes (tested)
adrian2013-01-31 12:18:37 +00:00
03138b388a
nanojpeg-fix due to recent architecure changes (compiled but not tested)
adrian2013-01-31 12:18:32 +00:00
db35166d67
- Added and updated documentation for gem5 - Added gem5 configuration used for profiling
friemel2013-01-30 23:59:32 +00:00
7588834f41
Added weather-monitor-gem5 experiment, which is a clone of the weather-monitor experiment with only one run per fail* instance.
friemel2013-01-30 23:59:28 +00:00
9c62e4a7f2
- Added signaling of trap situations needed in the weather-monitor to gem5. - Fixed setting of instruction address for simulator.onMemoryAccess() calls.
friemel2013-01-30 23:59:24 +00:00
640f5436cc
Bugfix for regression-test experiment
hellwig2013-01-30 14:58:18 +00:00
1ce2cd96be
regression-test fixes: use new register access syntax
adrian2013-01-17 13:41:27 +00:00
125914a305
BochsRegister.hpp and BochsRegisterIDs.hpp not needed anymore
adrian2013-01-17 13:41:23 +00:00
03b4356598
Bugfix: Let Bochs' trigger breakpoint events even in case of rep-instructions
adrian2013-01-17 13:41:19 +00:00
0ba62aea8f
Both performance aspects need to respect the argument order of their target methods (pointcuts)
adrian2013-01-17 13:41:15 +00:00
edf44aec28
Bugfixes for aspect headers due to architecure-related changes.
adrian2013-01-17 13:41:11 +00:00
214bb36b47
onIOPort needs to have a ConcreteCPU argument as well; detectCPU() added
adrian2013-01-17 13:41:07 +00:00
d3cf2359a4
FIXMEs and comments updated due to last architecture-related changes
adrian2013-01-17 13:41:03 +00:00
c4e5ab4f58
Fixed reading of instruction pointer for gem5.
friemel2013-01-16 15:27:10 +00:00
afca00ce0a
- Added a define which marks the use of BPRangeListener - Gem5 now has two different implementation for breakpoints. - If only BPSingleListener are used, gem5 Breakpoints are used - If BPRangeListener are used, gem5 calls onBreakpoint() in every simulated instruction
friemel2013-01-16 15:27:06 +00:00
ac7cec7684
ElfReader: Constructor tries to get ELF from ENV FAIL_ELF_PATH
hoffmann2013-01-15 12:53:49 +00:00
35753cd075
coding style++, some TODOs added.
adrian2012-12-05 12:27:17 +00:00
b052c0494b
Architecture changes (only gem5 implementation right now): - The register manager is gone. It's functionality is now encapsulated in the CPU classes. - For the client, there is the ConcreteCPU class that encapsulates the access to the CPU state (including registers) and architecture details. The correspondig objects for the CPUs inside the simulator can be accessed through the SimulatorController.getCPU() function. - Listener got a new ConcreteCPU* member to filter for which CPU the events should fire. The default NULL is used as wildcard for all aviable CPUs. The events respectively got a ConcreteCPU* member to indicate which CPU really fired the event. - For the server, there is CPUArchitecture to access the architecture details.
friemel2012-12-02 17:50:46 +00:00
fc1d21fe53
Bugfix for server-client communication
hellwig2012-11-30 18:13:13 +00:00
c689c159fb
Bugfix of overloaded << operator
hellwig2012-11-30 16:50:06 +00:00
d7842c2ad7
The Jobclient can get several jobs with one request
hellwig2012-11-30 16:50:02 +00:00
da3b2b8253
Adding some documentation
unzner2012-11-28 14:02:21 +00:00
87ee9df37b
ecos: additional burst fault model
hsc2012-11-27 17:06:32 +00:00
e130c204aa
the injection offset in IDCFlip is now completely left aligned (instead of bytewise left aligned and bitwise right aligned)
unzner2012-11-27 16:59:05 +00:00
158ac496fe
Adapted comment to the new TimerListener interface
unzner2012-11-24 09:48:31 +00:00
1b9583aede
Now the names of the experiments will be consistent with my written work
unzner2012-11-24 09:37:38 +00:00
5135c79c05
TimerListener: microsecond granularity (ms is too coarse)
hsc2012-11-23 15:35:08 +00:00