3 Commits

Author	SHA1	Message	Date
ChUrl	f472994fda	Add clock input to ALU/ConditionalUnit	2023-03-30 00:21:47 +02:00
ChUrl	ea5b2c53c2	Add missing "signed" to ALU ports/connections	2023-03-29 15:03:20 +02:00
ChUrl	49d1871dfa	Implement ALU/Register components	2023-03-23 21:51:50 +01:00