Add missing "signed" to ALU ports/connections

ConditionalUnit.sv

@@ -12,10 +12,11 @@
 //              111 - >= 0
 module ConditionalUnit(
   input var logic[2:0] opcode,
-  input var logic[7:0] operand,
+  input var logic signed[7:0] operand,
   output var logic result
 );
 
+  // This could be simplified significantly (basically removed), if I had ALU flags.
   always_comb case (opcode)
     3'b000: result = 0;
     3'b001: result = (operand == 0);