This change adapts the gem5 backend to the Register class interface change
in commit 52723a8. The necessary modifications suggested adding the "misc"
registers from gem5, too.
Change-Id: I32561c3fc905b9cd396e32ce80c791c01d5682fb
The SConscript in src/core/sal/gem5 is now generated via CMake
(SConscript.in). No more hardcoded relative paths -> Fail* build
folder can now be anywhere. Experiment and Plugin libraries are now
set automagically (using ${EXPERIMENTS_ACTIVATED} /
${PLUGINS_ACTIVATED})
Generated SConscript now resides in binary dir.
Change-Id: I1bf2e17c83c95ffdcf6801c02481064fcb63bfb0
The build system now allows incremental gem5 builds. Unfortunately,
the current solution always requires re-linking the executable.
Without the enforcement of re-linking, the fail code will be rebuilt
but not linked into gem5.
The number of cores for building gem5 is derived from /proc/cpuinfo.
As before, only the gem5.debug configuration is supported.
Change-Id: Ib13b15d1ecd62196eb251e0fd00953f4eb052feb
Doxygen skips undesired directories and files now. In addition, the
documentation of the "fail" namespace has been fixed. Note that there
are still several warnings (due to incomplete documentations) in the
Doxygen output.
Change-Id: Idad4f1ecff453765b307fa40a5c1cebc0c2ce2bb
The checkpoint which is produced by this save method is a little bit
different to the checkpoint which is produced by the --take-checkpoint
command. It differs in the save-parameters so_state, funcExeInst, intRegs,
_upc, _nupc, _when. Tests have shown that it probably does not affect the
course of the program execution.
Change-Id: Id776a10f2d40f71643e9edbb45d7368609309df4
The checkpoint which is produced by this save method is a little bit
different to the checkpoint which is produced by the --take-checkpoint
command. It differs in the save-parameters so_state, funcExeInst, intRegs,
_upc, _nupc, _when. Tests have shown that it probably does not affect the
course of the program execution.
Change-Id: I19b3fc809288224532e0ed6b7910a45115cb1c5d
The previous implementation wasn't in a working state because
the register content retrieval was buggy. (For example, RT_FP
does *not* denote a "floating point" register. Instead, it is
the frame pointer!)
Change-Id: I31fd80d374c945adaf35b47958d6437a8e2d48c3
Now, the gem5 implementation equals the Bochs variant. Note that it's
*not* necessary to enable CONFIG_EVENTS_BREAKPOINTS_RANGE in order to
use range breakpoints.
In addition, gem5 distinguishes between macro- and microops. With the
new implementation, onBreakpoint() is only called when a macroop
changes.
Change-Id: Ib86d1802fc70c20d22ca1a1ece0e8d1221b2e7db
Encapsulated gem5-specific code into wrapper functions to separate the
build process (Fail: CMake, gem5: scons). Added some gem5-related FIXMEs.
Another CMake related FIXME added. +some cosmetics.
Change-Id: Id84b480127b1f13aed6a0ee97f3583f410d531c5
In fact, delete should be called in the destructor of each derived class (BochsController and Gem5Controller at the moment).
Additionally, this is the reason why ~SimulatorController is declared as virtual.
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2064 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
- Gem5 now has two different implementation for breakpoints.
- If only BPSingleListener are used, gem5 Breakpoints are used
- If BPRangeListener are used, gem5 calls onBreakpoint() in every simulated instruction
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2003 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
- The register manager is gone. It's functionality is now encapsulated in the
CPU classes.
- For the client, there is the ConcreteCPU class that encapsulates the access
to the CPU state (including registers) and architecture details. The
correspondig objects for the CPUs inside the simulator can be accessed
through the SimulatorController.getCPU() function.
- Listener got a new ConcreteCPU* member to filter for which CPU the events
should fire. The default NULL is used as wildcard for all aviable CPUs. The
events respectively got a ConcreteCPU* member to indicate which CPU really
fired the event.
- For the server, there is CPUArchitecture to access the architecture details.
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1966 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
- FailGem5Device is gone.
- There are now changes directly made to the gem5 source.
- Gem5Connector is a helper class that is compiled inside the gem5 context to workaround problems with gem5 header in fail.
Things that are working:
- BPSingleListener
- MemAccessListener
- Save and restore simulator state
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1820 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
Unfortunately, this does not (yet) work as advertised. I need to fight another
round of CMake battles before retrying. Reverting to previous state for now.
This reverts r1753.
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1767 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
ag++ is now called with a list of currently active aspect headers
(ag++ -a aspect1.ah -a aspect2.ah ...). This resolves several problems at
once:
- Build directories may be positioned arbitrarily now, they need not be
a subdirectory of the project anymore.
- Multiple build directories can coexist within the project tree. Before
this commit, the generated instantiate-*.ah aspect headers disturbed
neighboring build trees.
- Due to this, the regression test should be runnable much more easily
now.
- The build time was reduced by an average of about 10%.
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1753 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
This is a precaution to avoid current and future naming conflicts with
common system libraries. libutil (part of libc) is the first, but probably
not the last example that already caused trouble twice.
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1614 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
