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Author	SHA1	Message	Date
christoph	95d911c3be	Fix an output format bug	2023-03-29 19:24:21 +02:00
christoph	f554efcd7d	Reassemble example programs	2023-03-29 19:14:00 +02:00
christoph	a7f4bf6e92	Update format to SystemVerilog Module	2023-03-29 19:13:51 +02:00
christoph	28a7c14059	Update .gitignore	2023-03-29 19:13:41 +02:00
christoph	8114c9b5fd	Initial commit (from Logisim-Assembler)	2023-03-29 18:47:37 +02:00