1

Parametrize the counter bit width

This commit is contained in:
2023-03-30 00:21:15 +02:00
parent 88a72358f7
commit 72f7f6ca18

View File

@ -1,19 +1,20 @@
`default_nettype none `default_nettype none
module Counter( module Counter
#(parameter WIDTH = 8)(
input var logic clock, input var logic clock,
input var logic reset, input var logic reset,
input var logic decrement, input var logic decrement,
input var logic setvalue, input var logic setvalue,
input var logic[7:0] valuein, input var logic[WIDTH-1:0] valuein,
output var logic[7:0] valueout output var logic[WIDTH-1:0] valueout
); );
var logic[7:0] countervalue; var logic[WIDTH-1:0] countervalue;
always @(posedge clock or posedge reset) begin always @(posedge clock or posedge reset) begin
if (reset) begin if (reset) begin
countervalue = 8'b0; countervalue = WIDTH'(0);
end else if (setvalue) begin end else if (setvalue) begin
countervalue = valuein; countervalue = valuein;
end else begin end else begin