coding-style++, gem5 code doc added

git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2083 8c4709b5-6ec9-48aa-a5cd-a96041d1645a

src/core/sal/arm/Architecture.hpp

@@ -21,7 +21,8 @@ private:
 
 /**
  * \enum GPRegIndex
- * TODO.
+ * Defines the general purpose (GP) register identifier for the ARM
+ * plattform. Some of them are just aliases.
  */
 enum GPRegIndex {
 	RI_R0,

src/core/sal/arm/CPUState.hpp

@@ -6,6 +6,11 @@
 
 namespace fail {
 
+/**
+ * \class ArmCPUState
+ * This class represents the current state of a ARM based CPU. A final CPU class
+ * need to implement \c ArmCPUState and \c ArmArchitecture.
+ */
 class ArmCPUState : public CPUState {
 public:
 	virtual regdata_t getRegisterContent(Register* reg) = 0;