accfba8237
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2083 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
77 lines
1.1 KiB
C++
77 lines
1.1 KiB
C++
#ifndef __ARM_ARCHITECURE_HPP__
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#define __ARM_ARCHITECURE_HPP__
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#include "../CPU.hpp"
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#include "../CPUState.hpp"
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namespace fail {
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/**
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* \class ArmArchitecture
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* This class adds ARM specific functionality to the base architecture.
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* This can be used for every simulator backend that runs on ARM.
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*/
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class ArmArchitecture : public CPUArchitecture {
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public:
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ArmArchitecture();
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~ArmArchitecture();
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private:
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void fillRegisterList();
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};
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/**
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* \enum GPRegIndex
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* Defines the general purpose (GP) register identifier for the ARM
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* plattform. Some of them are just aliases.
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*/
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enum GPRegIndex {
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RI_R0,
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RI_R1,
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RI_R2,
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RI_R3,
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RI_R4,
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RI_R5,
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RI_R6,
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RI_R7,
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RI_R8,
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RI_R9,
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RI_R10,
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RI_R11,
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RI_R12,
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RI_R13,
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RI_SP = RI_R13,
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RI_R14,
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RI_LR = RI_R14,
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RI_R15,
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RI_IP = RI_R15,
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RI_R13_SVC,
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RI_R14_SVC,
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RI_R13_MON,
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RI_R14_MON,
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RI_R13_ABT,
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RI_R14_ABT,
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RI_R13_UND,
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RI_R14_UND,
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RI_R13_IRQ,
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RI_R14_IRQ,
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RI_R8_FIQ,
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RI_R9_FIQ,
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RI_R10_FIQ,
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RI_R11_FIQ,
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RI_R12_FIQ,
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RI_R13_FIQ,
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RI_R14_FIQ
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};
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// TODO: Enum for misc registers
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} // end-of-namespace: fail
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#endif // __ARM_ARCH_HPP__
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