christoph/systemverilog-rom-assembler
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Start at ROM address 1

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This commit is contained in:
Christoph Urlacher
2023-03-30 16:34:14 +02:00
parent 01d1d4b632
commit 3ebced585f
1 changed files with 4 additions and 2 deletions
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6
src/main.cpp
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@ -75,9 +75,11 @@ auto write(const std::string &output_file, const std::vector<std::string> &outpu
<< " output var logic[7:0] dataout\n"
<< ");\n\n"
<< " always @(address) case (address)\n";
for (uint32_t i = 0; i <= 255; ++i) {
for (uint32_t i = 0; i < 255; ++i) {
if (i < output_string.size()) {
ofs << " 8'b" << std::bitset<8>(i).to_string() << ": dataout = 8'b" << output_string[i] << ";\n";
ofs << " 8'b" << std::bitset<8>(i + 1).to_string() << ": dataout = 8'b" << output_string[i] << ";\n";
} else {
break;
}
}
ofs << " default: dataout = 8'b00000000;\n"