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Add missing "signed" to ALU ports/connections

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Christoph Urlacher
2023-03-29 15:03:20 +02:00
parent 17493586ff
commit ea5b2c53c2
6 changed files with 150 additions and 16 deletions
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8
ALU_TestBench.sv
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@ -3,9 +3,9 @@
module ALU_TestBench;
var logic[2:0] opcode;
var logic[7:0] operandA;
var logic[7:0] operandB;
tri[7:0] result;
var logic signed[7:0] operandA;
var logic signed[7:0] operandB;
tri signed[7:0] result;
ALU alu(
.opcode(opcode),
@ -22,7 +22,7 @@ initial begin
opcode = 3'b000;
operandA = 8'b00000000;
operandB = 8'b00000000;
#100 assert(result == 8'b00000000);
#20 assert(result == 8'b00000000);
// First set of operands
operandA = 8'b00000000;