The input (taken on stdin) is a gem5.opt --debug-flags=MemoryAccess
trace (--format gem5), or a dump-trace output (--format dump) for easy
trace synthesis (for testing purposes).
gem5 format: Currently imports physical, not virtual memory addresses.
dump format: Currently ignores extended trace information.
Change-Id: Ic26a996d6fb9ce4175c855fadcbcff9ac9263888
The new parameter -s/--stats shows trace statistics such as number of
instructions, number of memory reads/writes, and duration in simulator
time.
Change-Id: I39a48ff62d9c308c420fe52e7ed17ed57ae9c139
TODO: Showing timing or extended trace information should be configurable
with a commandline switch later.
Change-Id: I72ac95ddd1d54dfef87f212ec5afa30b2ed9a6ad
This adds an interface for a backend-specific notion of time, e.g. CPU
cycles since simulator start, and a concrete implementation for the
Bochs backend. This is needed to record CPU idle times (e.g., HLT
instruction), and for target backends capable of more timing-accurate
execution.
This change also modifies the tracing plugin to add the time to all
trace events.
Change-Id: I93ac1d54c07f32b0b8f84f333417741d8e9c8288
The full-tracing plugin was used in the DSN paper. It additionally
traces the data that was accessed/written on a memory access and the
contents of some CPU registers.
Change-Id: I61f5230699009ce523aba341985b98148160556d
