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Make FailBochs compile again (after changes in r1966).

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For now, only breakpoints are working. Other event sources need to be revised, too.

git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1981 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
This commit is contained in:
adrian
2012-12-12 13:08:43 +00:00
parent 2010d4c385
commit f8aa1237e9
8 changed files with 192 additions and 50 deletions
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60
src/core/sal/bochs/BochsCPU.cc Normal file
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#include "BochsCPU.hpp"
#include "../SALConfig.hpp"
#include <cassert>
namespace fail {
regdata_t BochsCPU::getRegisterContent(Register* reg)
{
assert(reg != NULL && "FATAL ERROR: reg-ptr cannot be NULL!");
// TODO: BX_CPU(0) *always* correct?
if (reg->getId() == RID_FLAGS) // EFLAGS register?
return *reinterpret_cast<regdata_t*>(&(BX_CPU(id)->eflags));
#ifdef SIM_SUPPORT_64
if (reg->getId() == RID_PC) // program counter?
return static_cast<regdata_t>(BX_CPU(id)->gen_reg[BX_64BIT_REG_RIP].rrx);
else // 64 bit general purpose registers
return static_cast<regdata_t>(BX_CPU(id)->gen_reg[reg->getId()].rrx);
#else // 32 bit mode
if (reg->getId() == RID_PC)
return static_cast<regdata_t>(BX_CPU(id)->gen_reg[BX_32BIT_REG_EIP].dword.erx);
else // 32 bit general purpose registers
return static_cast<regdata_t>(BX_CPU(id)->gen_reg[reg->getId()].dword.erx);
#endif // SIM_SUPPORT_64
}
void BochsCPU::setRegisterContent(Register* reg, regdata_t value)
{
assert(reg != NULL && "FATAL ERROR: reg-ptr cannot be NULL!");
// TODO: BX_CPU(0) *always* correct?
if (reg->getId() == RID_FLAGS) { // EFLAGS register?
regdata_t* pData = reinterpret_cast<regdata_t*>(&(BX_CPU(id)->eflags));
#ifdef SIM_SUPPORT_64
// We are in 64 bit mode: Just assign the lower 32 bits!
*pData = ((*pData) & 0xFFFFFFFF00000000ULL) | (value & 0xFFFFFFFFULL);
#else
*pData = value;
#endif
return;
}
regdata_t* pData;
#ifdef SIM_SUPPORT_64
if (reg->getId() == RID_PC) // program counter?
pData = &(BX_CPU(id)->gen_reg[BX_64BIT_REG_RIP].rrx);
else // 64 bit general purpose registers
pData = &(BX_CPU(id)->gen_reg[reg->getId()].rrx);
#else // 32 bit mode
if (reg->getId() == RID_PC)
pData = &(BX_CPU(id)->gen_reg[BX_32BIT_REG_EIP].dword.erx);
else // 32 bit general purpose registers
pData = &(BX_CPU(id)->gen_reg[reg->getId()].dword.erx);
#endif // SIM_SUPPORT_64
*pData = value;
}
} // end-of-namespace: fail