- Added signaling of trap situations needed in the weather-monitor to gem5.

- Fixed setting of instruction address for simulator.onMemoryAccess() calls.

git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@2025 8c4709b5-6ec9-48aa-a5cd-a96041d1645a

simulators/gem5/src/mem/abstract_mem.cc

@@ -62,9 +62,6 @@
 #include "mem/packet_access.hh"
 #include "sim/system.hh"
 
-#include "config/FailConfig.hpp"
-#include "sal/SALInst.hpp"
-
 using namespace std;
 
 AbstractMemory::AbstractMemory(const Params *p) :

simulators/gem5/src/mem/bus.cc

@@ -53,6 +53,9 @@
 #include "debug/BusAddrRanges.hh"
 #include "mem/bus.hh"
 
+#include "config/FailConfig.hpp"
+#include "sal/SALInst.hpp"
+
 BaseBus::BaseBus(const BaseBusParams *p)
     : MemObject(p), clock(p->clock),
       headerCycles(p->header_cycles), width(p->width), tickNextIdle(0),
@@ -291,6 +294,11 @@ BaseBus::findPort(Addr addr)
 
     // we should use the range for the default port and it did not
     // match, or the default port is not set
+	// FAIL*
+	#ifdef CONFIG_EVENT_TRAP
+	fail::ConcreteCPU* cpu = &fail::simulator.getCPU(0);
+	fail::simulator.onTrap(cpu, 0);
+	#endif
     fatal("Unable to find destination for addr %#llx on bus %s\n", addr,
           name());
 }