comments and coding-style fixed.

git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1498 8c4709b5-6ec9-48aa-a5cd-a96041d1645a

src/core/sal/Event.hpp

@@ -197,7 +197,7 @@ public:
 	 * Returns \c true if the interrupt is non maskable, \c false otherwise.
 	 * @return \c true if NMI flag is set, \c false otherwise
 	 */
-	bool isNMI() { return m_IsNMI; }
+	bool isNMI() const { return m_IsNMI; }
 	/**
 	 * Sets the interrupt type (non maskable or not).
 	 * @param nmi the new NMI (non maskable interrupt) flag state

src/core/sal/Listener.hpp

@@ -383,6 +383,7 @@ public:
 	 * @return a copy of the list which contains all observed numbers 
 	 */
 	std::vector<unsigned> getWatchNumbers() { return m_WatchNumbers; }
+	// FIXME: Any reason for returning a *copy* of the vector? (-> overhead!)
 	/**
 	* Checks whether a given interrupt-/trap-number is matching.
 	*/
@@ -412,7 +413,7 @@ public:
 	/**
 	 * Returns \c true if the interrupt is non maskable, \c false otherwise.
 	 */
-	bool isNMI() { return m_Data.isNMI(); }
+	bool isNMI() const { return m_Data.isNMI(); }
 	/**
 	 * Sets the interrupt type (non maskable or not).
 	 */

src/core/sal/SimulatorController.cc

@@ -1,5 +1,6 @@
 #include "SimulatorController.hpp"
 #include "SALInst.hpp"
+#include "Event.hpp"
 
 namespace fail {
 
@@ -49,7 +50,7 @@ void SimulatorController::onBreakpoint(address_t instrPtr, address_t address_spa
 	"FIXME: SimulatorController::onBreakpoint() has not been tested before");
 	// FIXME: Improve performance!
 
-	// Loop through all events of type BP*Listener:
+	// Loop through all listeners of type BP*Listener:
 	ListenerManager::iterator it = m_LstList.begin();
 	while (it != m_LstList.end()) {
 		BaseListener* pev = *it;
@@ -80,13 +81,13 @@ void SimulatorController::onMemoryAccess(address_t addr, size_t len,
 		         : MemAccessEvent::MEM_READ;
 
 	ListenerManager::iterator it = m_LstList.begin();
-	while (it != m_LstList.end()) { // check for active events
+	while (it != m_LstList.end()) { // check for active listeners
 		BaseListener* pev = *it;
 		MemAccessListener* ev = dynamic_cast<MemAccessListener*>(pev);
 		// Is this a MemAccessListener? Correct access type?
 		if (!ev || !ev->isMatching(addr, len, accesstype)) {
 			++it;
-			continue; // skip event activation
+			continue; // skip listener activation
 		}
 		ev->setTriggerAddress(addr);
 		ev->setTriggerWidth(len);
@@ -100,12 +101,12 @@ void SimulatorController::onMemoryAccess(address_t addr, size_t len,
 void SimulatorController::onInterrupt(unsigned interruptNum, bool nmi)
 {
 	ListenerManager::iterator it = m_LstList.begin();
-	while (it != m_LstList.end()) { // check for active events 
+	while (it != m_LstList.end()) { // check for active listeners 
 		BaseListener* pev = *it;
 		InterruptListener* pie = dynamic_cast<InterruptListener*>(pev);
 		if (!pie || !pie->isMatching(interruptNum)) {
 			++it;
-			continue; // skip event activation
+			continue; // skip listener activation
 		}
 		pie->setTriggerNumber(interruptNum);
 		pie->setNMI(nmi);
@@ -158,12 +159,12 @@ bool SimulatorController::removeSuppressedInterrupt(unsigned interruptNum)
 void SimulatorController::onTrap(unsigned trapNum)
 {
 	ListenerManager::iterator it = m_LstList.begin();
-	while (it != m_LstList.end()) { // check for active events
+	while (it != m_LstList.end()) { // check for active listeners
 		BaseListener* pev = *it;
 		TrapListener* pte = dynamic_cast<TrapListener*>(pev);
 		if (!pte || !pte->isMatching(trapNum)) {
 			++it;
-			continue; // skip event activation
+			continue; // skip listener activation
 		}
 		pte->setTriggerNumber(trapNum);
 		it = m_LstList.makeActive(it);
@@ -174,7 +175,7 @@ void SimulatorController::onTrap(unsigned trapNum)
 void SimulatorController::onGuestSystem(char data, unsigned port)
 {
 	ListenerManager::iterator it = m_LstList.begin();
-	while (it != m_LstList.end()) { // check for active events
+	while (it != m_LstList.end()) { // check for active listeners
 		BaseListener* pev = *it;
 		GuestListener* pge = dynamic_cast<GuestListener*>(pev);
 		if (pge != NULL) {
@@ -191,7 +192,7 @@ void SimulatorController::onGuestSystem(char data, unsigned port)
 void SimulatorController::onJump(bool flagTriggered, unsigned opcode)
 {
 	ListenerManager::iterator it = m_LstList.begin();
-	while (it != m_LstList.end()) { // check for active events
+	while (it != m_LstList.end()) { // check for active listeners
 		JumpListener* pje = dynamic_cast<JumpListener*>(*it);
 		if (pje != NULL) {
 			pje->setOpcode(opcode);
@@ -214,7 +215,7 @@ void SimulatorController::addFlow(ExperimentFlow* flow)
 
 void SimulatorController::removeFlow(ExperimentFlow* flow)
 {
-	// remove all remaining events of this flow
+	// remove all remaining listeners of this flow
 	clearListeners(flow);
 	// remove coroutine
 	m_Flows.remove(flow);

src/core/sal/SimulatorController.hpp

@@ -28,7 +28,7 @@ class MemoryManager;
  * This class manages (1..N) experiments and provides access to the underlying
  * simulator/debugger system. Experiments can enlist arbritrary listeners
  * (Breakpoint, Memory access, Traps, etc.). The \c SimulatorController then
- * activates the specific experiment There are further methods to read/write
+ * activates the specific experiment. There are further methods to read/write
  * registers and memory, and control the SUT (save/restore/reset).
  */
 class SimulatorController {
@@ -160,7 +160,7 @@ public:
 	 * Returns the (constant) initialized memory manager.
 	 * @return a reference to the memory manager
 	 */
-	MemoryManager& getMemoryManager() { return (*m_Mem); }
+	MemoryManager& getMemoryManager() { return *m_Mem; }
 	const MemoryManager& getMemoryManager() const { return *m_Mem; }
 	/**
 	 * Sets the memory manager.

src/core/sal/bochs/BochsController.hpp

@@ -138,7 +138,7 @@ public:
 	inline bxICacheEntry_c *getICacheEntry() const { return m_CacheEntry; }
 	/**
 	 * Retrieves the current CPU context
-	 * @return a pointer to a BX_CPU_C object
+	 * @return a pointer to a \c BX_CPU_C object
 	 */
 	inline BX_CPU_C *getCPUContext() const { return m_CPUContext; }
 private: