Introducing the BufferCache announced on the mailing list, and some small changes. L4Sys is still WIP.
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1316 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
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@ -92,10 +92,14 @@ void BochsController::dbgEnableInstrPtrOutput(unsigned regularity, std::ostream*
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void BochsController::onInstrPtrChanged(address_t instrPtr, address_t address_space)
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{
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#ifdef DEBUG
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#if 0
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//the original code - performs magnitudes worse than
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//the code below and is responsible for most (~87 per cent)
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//of the slowdown of FailBochs
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#ifdef DEBUG
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if(m_Regularity != 0 && ++m_Counter % m_Regularity == 0)
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(*m_pDest) << "0x" << std::hex << instrPtr;
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#endif
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#endif
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// Check for active breakpoint-events:
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fi::EventList::iterator it = m_EvList.begin();
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while(it != m_EvList.end())
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@ -113,6 +117,37 @@ void BochsController::onInstrPtrChanged(address_t instrPtr, address_t address_sp
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it++;
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}
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m_EvList.fireActiveEvents();
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#endif
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//this code is highly optimised for the average case, so it me appear a bit ugly
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bool do_fire = false;
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unsigned i = 0;
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fi::BufferCache<fi::BPEvent*> *buffer_cache = m_EvList.getBPBuffer();
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while(i < buffer_cache->get_count()) {
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fi::BPEvent *pEvBreakpt = buffer_cache->get(i);
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if(pEvBreakpt->isMatching(instrPtr, address_space)) {
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pEvBreakpt->setTriggerInstructionPointer(instrPtr);
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//transition to STL: find the element we are working on in the Event List
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fi::EventList::iterator it = std::find(m_EvList.begin(), m_EvList.end(), pEvBreakpt);
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it = m_EvList.makeActive(it);
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//find out how much elements need to be skipped to get in sync again
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//(should be one or none, the loop is just to make sure)
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for(unsigned j = i; j < buffer_cache->get_count(); j++) {
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if(buffer_cache->get(j) == (*it)) {
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i = j;
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break;
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}
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}
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// we now know we need to fire the active events - usually we do not have to
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do_fire = true;
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// "i" has already been set to the next element (by calling
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// makeActive()):
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continue; // -> skip loop increment
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}
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i++;
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}
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if(do_fire)
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m_EvList.fireActiveEvents();
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// Note: SimulatorController::onBreakpointEvent will not be invoked in this
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// implementation.
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}
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@ -14,7 +14,7 @@
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aspect IOPortCom
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{
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// ATM only capturing bytewise output (most common, I suppose)
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pointcut outInstruction() = "% ...::bx_cpu_c::OUT_DXAL%(...)";
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pointcut outInstruction() = "% ...::bx_cpu_c::OUT_DXAL(...)";
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advice execution (outInstruction()) : after ()
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{
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@ -23,7 +23,7 @@ aspect IOPortCom
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sal::simulator.onIOPortEvent(rAL, rDX, true);
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}
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pointcut inInstruction() = "% ...::bx_cpu_c::IN_ALDX%(...)";
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pointcut inInstruction() = "% ...::bx_cpu_c::IN_ALDX(...)";
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advice execution (inInstruction()) : after ()
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{
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