christoph/fail
1
Fork 0
Code Releases Activity

gem5: TrapListener implemented

Browse Source 
The TrapListener works like in Bochs.
Instead of a number to a trap the offset is returned for GEM5.
See:
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0211h/Babfeega.html

Conflicts:
	simulators/gem5/src/cpu/simple/atomic.cc

Change-Id: Ia8b2083e3c16315d9c577150f14f16995494b2e6
This commit is contained in:
Richard Hellwig
2014-01-17 13:13:02 +01:00
committed by Horst Schirmeier
parent fa1690bd1f
commit 5fbf13d07d
7 changed files with 30 additions and 53 deletions
Download Patch File Download Diff File Expand all files Collapse all files

7
simulators/gem5/src/dev/arm/pl011.cc
View File

@ -185,13 +185,8 @@ Pl011::write(PacketPtr pkt)
switch (daddr) {
case UART_DR:
if ((data & 0xFF) == 0x04 && endOnEOT) {
// FAIL*
#ifdef CONFIG_EVENT_TRAP
fail::ConcreteCPU* cpu = &fail::simulator.getCPU(0);
fail::simulator.onTrap(cpu, 0);
#endif
exitSimLoop("UART received EOT", 0);
}
}
term->out(data & 0xFF);

9
simulators/gem5/src/dev/isa_fake.cc
View File

@ -116,14 +116,7 @@ IsaFake::write(PacketPtr pkt)
data = pkt->get<uint8_t>();
break;
default:
// FAIL*
#ifdef CONFIG_EVENT_TRAP
fail::ConcreteCPU* cpu = &fail::simulator.getCPU(0);
fail::simulator.onTrap(cpu, 0);
#endif
panic("invalid access size!\n");
panic("invalid access size!\n");
}
warn("Device %s accessed by write to address %#x size=%d data=%#x\n",
name(), pkt->getAddr(), pkt->getSize(), data);