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XIP adaptation for xtensa platform (#1636)

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Add macro WASM_ENABLE_WORD_ALING_READ to enable reading
1/2/4 and n bytes data from vram buffer, which requires 4-byte addr
alignment reading.

Eliminate XIP AOT relocations related to the below ones:
   i32_div_u, f32_min, f32_max, f32_ceil, f32_floor, f32_trunc, f32_rint
This commit is contained in:
dongsheng28849455
2022-10-31 17:25:24 +08:00
committed by GitHub
parent dba9e52f2f
commit e517dbc7b2
10 changed files with 244 additions and 11 deletions
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17
core/iwasm/compilation/aot_emit_numberic.c
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@ -565,7 +565,22 @@ compile_int_div(AOTCompContext *comp_ctx, AOTFuncContext *func_ctx,
PUSH_INT(res);
return true;
case INT_DIV_U:
LLVM_BUILD_OP(UDiv, left, right, res, "div_u", false);
if (comp_ctx->disable_llvm_intrinsics && is_i32
&& aot_intrinsic_check_capability(comp_ctx, "i32.div_u")) {
res = aot_call_llvm_intrinsic(comp_ctx, func_ctx,
"i32.div_u", param_types[0],
param_types, 2, left, right);
}
else if (comp_ctx->disable_llvm_intrinsics && !is_i32
&& aot_intrinsic_check_capability(comp_ctx,
"i64.div_u")) {
res = aot_call_llvm_intrinsic(comp_ctx, func_ctx,
"i64.div_u", param_types[0],
param_types, 2, left, right);
}
else {
LLVM_BUILD_OP(UDiv, left, right, res, "div_u", false);
}
PUSH_INT(res);
return true;
case INT_REM_S: