XIP adaptation for xtensa platform (#1636)

Add macro WASM_ENABLE_WORD_ALING_READ to enable reading
1/2/4 and n bytes data from vram buffer, which requires 4-byte addr
alignment reading.

Eliminate XIP AOT relocations related to the below ones:
   i32_div_u, f32_min, f32_max, f32_ceil, f32_floor, f32_trunc, f32_rint
This commit is contained in:
dongsheng28849455
2022-10-31 17:25:24 +08:00
committed by GitHub
parent dba9e52f2f
commit e517dbc7b2
10 changed files with 244 additions and 11 deletions

View File

@ -110,6 +110,7 @@ typedef struct {
REG_SYM(aot_intrinsic_i64_div_u), \
REG_SYM(aot_intrinsic_i64_rem_s), \
REG_SYM(aot_intrinsic_i64_rem_u), \
REG_SYM(aot_intrinsic_i32_div_u), \
#define REG_COMMON_SYMBOLS \
REG_SYM(aot_set_exception_with_id), \