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Implement AOT support for RISCV (#649)

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Enable RISCV AOT support, the supported ABIs are LP64 and LP64D for riscv64, ILP32 and ILP32D for riscv32.
For wamrc:
    use --target=riscv64/riscv32 to specify the target arch of output AOT file,
    use --target-abi=lp64d/lp64/ilp32d/ilp32 to specify the target ABI,
    if --target-abi isn't specified, by default lp64d is used for riscv64, and ilp32d is used for riscv32.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
Co-authored-by: wenyongh <wenyong.huang@intel.com>
This commit is contained in:
Huang Qi
2021-07-22 11:16:47 +08:00
committed by GitHub
parent ea06c19a9d
commit e4023c8e02
29 changed files with 667 additions and 459 deletions
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2
wamr-compiler/build_llvm_xtensa.sh
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@ -27,7 +27,7 @@ if [ ! -f bin/llvm-lto ]; then
cmake ../llvm \
-DCMAKE_EXPORT_COMPILE_COMMANDS=ON \
-DCMAKE_BUILD_TYPE:STRING="Release" \
-DLLVM_TARGETS_TO_BUILD:STRING="X86;ARM;AArch64;Mips" \
-DLLVM_TARGETS_TO_BUILD:STRING="X86;ARM;AArch64;Mips;RISCV" \
-DLLVM_EXPERIMENTAL_TARGETS_TO_BUILD:STRING="Xtensa" \
-DLLVM_BUILD_LLVM_DYLIB:BOOL=OFF \
-DLLVM_OPTIMIZED_TABLEGEN:BOOL=ON \