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Implement AOT support for RISCV (#649)

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Enable RISCV AOT support, the supported ABIs are LP64 and LP64D for riscv64, ILP32 and ILP32D for riscv32.
For wamrc:
    use --target=riscv64/riscv32 to specify the target arch of output AOT file,
    use --target-abi=lp64d/lp64/ilp32d/ilp32 to specify the target ABI,
    if --target-abi isn't specified, by default lp64d is used for riscv64, and ilp32d is used for riscv32.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
Co-authored-by: wenyongh <wenyong.huang@intel.com>
This commit is contained in:
Huang Qi
2021-07-22 11:16:47 +08:00
committed by GitHub
parent ea06c19a9d
commit e4023c8e02
29 changed files with 667 additions and 459 deletions
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8
core/iwasm/compilation/aot_emit_numberic.c
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@ -767,6 +767,12 @@ is_target_mips(AOTCompContext *comp_ctx)
return !strncmp(comp_ctx->target_arch, "mips", 4);
}
static bool
is_target_riscv(AOTCompContext *comp_ctx)
{
return !strncmp(comp_ctx->target_arch, "riscv", 5);
}
static bool
is_targeting_soft_float(AOTCompContext *comp_ctx, bool is_f32)
{
@ -796,6 +802,8 @@ is_targeting_soft_float(AOTCompContext *comp_ctx, bool is_f32)
* so user must specify '--cpu-features=-fp' to wamrc if the target
* doesn't have or enable Floating-Point Coprocessor Option on xtensa. */
ret = (!is_f32 || strstr(feature_string, "-fp")) ? true : false;
else if (is_target_riscv(comp_ctx))
ret = !strstr(feature_string, "+d") ? true : false;
else
ret = true;