From e350e65b12b3b7f72d57a11bb14fbcd52dded792 Mon Sep 17 00:00:00 2001
From: Huang Qi <huangqi3@xiaomi.com>
Date: Mon, 4 Dec 2023 17:00:21 +0800
Subject: [PATCH] Don't add "+d" to riscv cpu features if already given (#2855)

---
 core/iwasm/compilation/aot_llvm.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/core/iwasm/compilation/aot_llvm.c b/core/iwasm/compilation/aot_llvm.c
index f15cfd82..adfc1d0b 100644
--- a/core/iwasm/compilation/aot_llvm.c
+++ b/core/iwasm/compilation/aot_llvm.c
@@ -2708,13 +2708,14 @@ aot_create_comp_context(const AOTCompData *comp_data, aot_comp_option_t option)
                               meta_target_abi);
 
             if (!strcmp(abi, "lp64d") || !strcmp(abi, "ilp32d")) {
-                if (features) {
+                if (features && !strstr(features, "+d")) {
                     snprintf(features_buf, sizeof(features_buf), "%s%s",
                              features, ",+d");
                     features = features_buf;
                 }
-                else
+                else if (!features) {
                     features = "+d";
+                }
             }
         }