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Implement XIP feature and enable ARC target support (#694)

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Implement XIP (Execution In Place) feature for AOT mode to enable running the AOT code inside AOT file directly, without memory mapping the executable memory for AOT code and applying relocations for text section. Developer can use wamrc with "--enable-indirect-mode --disable-llvm-intrinsics" flags to generate the AOT file and run iwasm with "--xip" flag. Known issues: there might still be some relocations in the text section which access the ".rodata" like sections.

And also enable ARC target support for both interpreter mode and AOT mode.

Signed-off-by: Wenyong Huang <wenyong.huang@intel.com>
This commit is contained in:
Wenyong Huang
2021-08-12 17:44:39 +08:00
committed by GitHub
parent 8fd89bd415
commit db695fada4
44 changed files with 2613 additions and 263 deletions
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4
core/shared/platform/zephyr/platform_internal.h
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@ -67,6 +67,8 @@ size_t strspn(const char *s, const char *accept);
size_t strcspn(const char *s, const char *reject);
/* math functions which are not provided by os */
double atan(double x);
double atan2(double y, double x);
double sqrt(double x);
double floor(double x);
double ceil(double x);
@ -83,6 +85,8 @@ float rintf(float x);
float truncf(float x);
int signbit(double x);
int isnan(double x);
double pow(double x, double y);
double scalbn(double x, int n);
unsigned long long int strtoull(const char *nptr, char **endptr, int base);
double strtod(const char *nptr, char **endptr);

5
core/shared/platform/zephyr/zephyr_platform.c
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@ -202,6 +202,11 @@ os_dcache_flush()
key = irq_lock();
SCB_CleanDCache();
irq_unlock(key);
#elif defined(CONFIG_SOC_CVF_EM7D) && defined(CONFIG_ARC_MPU) \
&& defined (CONFIG_CACHE_FLUSHING)
__asm__ __volatile__("sync");
z_arc_v2_aux_reg_write(_ARC_V2_DC_FLSH, BIT(0));
__asm__ __volatile__("sync");
#endif
}