Implement riscv support for interpreter (#505)
This commit is contained in:
Wang Ning
95
core/iwasm/common/arch/invokeNative_riscv32_ilp32.s
Normal file
95
core/iwasm/common/arch/invokeNative_riscv32_ilp32.s
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@ -0,0 +1,95 @@
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/*
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* Copyright (C) 2019 Intel Corporation. All rights reserved.
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* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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*/
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.text
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.align 2
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#ifndef BH_PLATFORM_DARWIN
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.globl invokeNative
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.type invokeNative, function
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invokeNative:
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#else
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.globl _invokeNative
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_invokeNative:
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#endif /* end of BH_PLATFORM_DARWIN */
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/*
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* Arguments passed in:
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*
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* a0 function ptr
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* a1 argv
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* a2 nstacks
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*/
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/*
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* sp (stack pointer)
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* |- sw to store 32-bit values from register to memory
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* |- lw to load from stack to register
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* fp/s0 (frame pointer)
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* a0-a7 (8 integer arguments)
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* |- sw to store
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* |- lw to load
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* t0-t6 (temporaries regisgers)
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* |- caller saved
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*/
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/* reserve space on stack to save return address and frame pointer */
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addi sp, sp, -8
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sw fp, 0(sp) /* save frame pointer */
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sw ra, 4(sp) /* save return address */
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mv fp, sp /* set frame pointer to bottom of fixed frame */
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/* save function ptr, argv & nstacks */
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mv t0, a0 /* t0 = function ptr */
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mv t1, a1 /* t1 = argv array address */
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mv t2, a2 /* t2 = nstack */
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/* fill in a0-7 integer-registers */
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lw a0, 0(t1) /* a0 = argv[0] */
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lw a1, 4(t1) /* a1 = argv[1] */
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lw a2, 8(t1) /* a2 = argv[2] */
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lw a3, 12(t1) /* a3 = argv[3] */
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lw a4, 16(t1) /* a4 = argv[4] */
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lw a5, 20(t1) /* a5 = argv[5] */
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lw a6, 24(t1) /* a6 = argv[6] */
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lw a7, 28(t1) /* a7 = argv[7] */
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addi t1, t1, 32 /* t1 points to stack args */
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/* directly call the function if no args in stack,
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x0 always holds 0 */
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beq t2, x0, call_func
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/* reserve enough stack space for function arguments */
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sll t3, t2, 2 /* shift left 2 bits. t3 = n_stacks * 4 */
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sub sp, sp, t3
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/* make 16-byte aligned */
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and sp, sp, ~15
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/* save sp in t4 register */
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mv t4, sp
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/* copy left arguments from caller stack to own frame stack */
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loop_stack_args:
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beq t2, x0, call_func
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lw t5, 0(t1) /* load stack argument, t5 = argv[i] */
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sw t5, 0(t4) /* store t5 to reseved stack, sp[j] = t5 */
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addi t1, t1, 4 /* move to next stack argument */
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addi t4, t4, 4 /* move to next stack pointer */
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addi t2, t2, -1 /* decrease t2 every loop, nstacks = nstacks -1 */
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j loop_stack_args
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call_func:
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jalr t0
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/* restore registers pushed in stack or saved in another register */
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return:
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mv sp, fp /* restore sp saved in fp before function call */
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lw fp, 0(sp) /* load previous frame poniter to fp register */
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lw ra, 4(sp) /* load previous return address to ra register */
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addi sp, sp, 8 /* pop frame, restore sp */
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jr ra
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104
core/iwasm/common/arch/invokeNative_riscv32_ilp32d.s
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104
core/iwasm/common/arch/invokeNative_riscv32_ilp32d.s
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@ -0,0 +1,104 @@
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/*
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* Copyright (C) 2019 Intel Corporation. All rights reserved.
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* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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*/
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.text
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.align 2
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#ifndef BH_PLATFORM_DARWIN
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.globl invokeNative
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.type invokeNative, function
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invokeNative:
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#else
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.globl _invokeNative
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_invokeNative:
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#endif /* end of BH_PLATFORM_DARWIN */
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/*
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* Arguments passed in:
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*
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* a0 function ptr
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* a1 argv
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* a2 nstacks
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*/
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/*
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* sp (stack pointer)
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* |- sw to store 32-bit values from register to memory
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* |- lw to load from stack to register
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* fp/s0 (frame pointer)
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* a0-a7 (8 integer arguments)
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* |- sw to store
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* |- lw to load
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* t0-t6 (temporaries regisgers)
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* |- caller saved
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*/
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/* reserve space on stack to save return address and frame pointer */
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addi sp, sp, -8
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sw fp, 0(sp) /* save frame pointer */
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sw ra, 4(sp) /* save return address */
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mv fp, sp /* set frame pointer to bottom of fixed frame */
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/* save function ptr, argv & nstacks */
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mv t0, a0 /* t0 = function ptr */
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mv t1, a1 /* t1 = argv array address */
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mv t2, a2 /* t2 = nstack */
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/* fill in a0-7 integer-registers */
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lw a0, 0(t1) /* a0 = argv[0] */
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lw a1, 4(t1) /* a1 = argv[1] */
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lw a2, 8(t1) /* a2 = argv[2] */
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lw a3, 12(t1) /* a3 = argv[3] */
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lw a4, 16(t1) /* a4 = argv[4] */
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lw a5, 20(t1) /* a5 = argv[5] */
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lw a6, 24(t1) /* a6 = argv[6] */
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lw a7, 28(t1) /* a7 = argv[7] */
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/* fill in fa0-7 float-registers*/
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fld fa0, 32(t1) /* fa0 = argv[8] */
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fld fa1, 40(t1) /* fa1 = argv[9] */
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fld fa2, 48(t1) /* fa2 = argv[10] */
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fld fa3, 56(t1) /* fa3 = argv[11] */
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fld fa4, 64(t1) /* fa4 = argv[12] */
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fld fa5, 72(t1) /* fa5 = argv[13] */
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fld fa6, 80(t1) /* fa6 = argv[14] */
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fld fa7, 88(t1) /* fa7 = argv[15] */
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addi t1, t1, 96 /* t1 points to stack args */
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/* directly call the function if no args in stack,
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x0 always holds 0 */
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beq t2, x0, call_func
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/* reserve enough stack space for function arguments */
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sll t3, t2, 2 /* shift left 2 bits. t3 = n_stacks * 4 */
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sub sp, sp, t3
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/* make 16-byte aligned */
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and sp, sp, ~15
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/* save sp in t4 register */
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mv t4, sp
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/* copy left arguments from caller stack to own frame stack */
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loop_stack_args:
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beq t2, x0, call_func
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lw t5, 0(t1) /* load stack argument, t5 = argv[i] */
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sw t5, 0(t4) /* store t5 to reseved stack, sp[j] = t5 */
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addi t1, t1, 4 /* move to next stack argument */
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addi t4, t4, 4 /* move to next stack pointer */
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addi t2, t2, -1 /* decrease t2 every loop, nstacks = nstacks -1 */
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j loop_stack_args
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call_func:
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jalr t0
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/* restore registers pushed in stack or saved in another register */
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return:
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mv sp, fp /* restore sp saved in fp before function call */
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lw fp, 0(sp) /* load previous frame poniter to fp register */
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lw ra, 4(sp) /* load previous return address to ra register */
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addi sp, sp, 8 /* pop frame, restore sp */
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jr ra
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95
core/iwasm/common/arch/invokeNative_riscv64_lp64.s
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95
core/iwasm/common/arch/invokeNative_riscv64_lp64.s
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@ -0,0 +1,95 @@
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/*
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* Copyright (C) 2019 Intel Corporation. All rights reserved.
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* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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*/
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.text
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.align 2
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#ifndef BH_PLATFORM_DARWIN
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.globl invokeNative
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.type invokeNative, function
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invokeNative:
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#else
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.globl _invokeNative
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_invokeNative:
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#endif /* end of BH_PLATFORM_DARWIN */
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/*
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* Arguments passed in:
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*
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* a0 function ptr
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* a1 argv
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* a2 nstacks
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*/
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/*
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* sp (stack pointer)
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* |- sd to store 64-bit values from register to memory
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* |- ld to load from stack to register
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* fp/s0 (frame pointer)
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* a0-a7 (8 integer arguments)
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* |- sd to store
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* |- ld to load
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* t0-t6 (temporaries regisgers)
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* |- caller saved
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*/
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/* reserve space on stack to save return address and frame pointer */
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addi sp, sp, -16
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sd fp, 0(sp) /* save frame pointer */
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sd ra, 8(sp) /* save return address */
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mv fp, sp /* set frame pointer to bottom of fixed frame */
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/* save function ptr, argv & nstacks */
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mv t0, a0 /* t0 = function ptr */
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mv t1, a1 /* t1 = argv array address */
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mv t2, a2 /* t2 = nstack */
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/* fill in a0-7 integer-registers*/
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ld a0, 0(t1) /* a0 = argv[0] */
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ld a1, 8(t1) /* a1 = argv[1] */
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ld a2, 16(t1) /* a2 = argv[2] */
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ld a3, 24(t1) /* a3 = argv[3] */
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ld a4, 32(t1) /* a4 = argv[4] */
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ld a5, 40(t1) /* a5 = argv[5] */
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ld a6, 48(t1) /* a6 = argv[6] */
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ld a7, 56(t1) /* a7 = argv[7] */
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addi t1, t1, 64 /* t1 points to stack args */
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/* directly call the function if no args in stack,
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x0 always holds 0 */
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beq t2, x0, call_func
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/* reserve enough stack space for function arguments */
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sll t3, t2, 3 /* shift left 3 bits. t3 = n_stacks * 8 */
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sub sp, sp, t3
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/* make 16-byte aligned */
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and sp, sp, ~(15LL)
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/* save sp in t4 register */
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mv t4, sp
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/* copy left arguments from caller stack to own frame stack */
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loop_stack_args:
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beq t2, x0, call_func
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ld t5, 0(t1) /* load stack argument, t5 = argv[i] */
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sd t5, 0(t4) /* store t5 to reseved stack, sp[j] = t5 */
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addi t1, t1, 8 /* move to next stack argument */
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addi t4, t4, 8 /* move to next stack pointer */
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addi t2, t2, -1 /* decrease t2 every loop, nstacks = nstacks -1 */
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j loop_stack_args
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call_func:
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jalr t0
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/* restore registers pushed in stack or saved in another register */
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return:
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mv sp, fp /* restore sp saved in fp before function call */
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ld fp, 0(sp) /* load previous frame poniter to fp register */
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ld ra, 8(sp) /* load previous return address to ra register */
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addi sp, sp, 16 /* pop frame, restore sp */
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jr ra
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108
core/iwasm/common/arch/invokeNative_riscv64_lp64d.s
Normal file
108
core/iwasm/common/arch/invokeNative_riscv64_lp64d.s
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@ -0,0 +1,108 @@
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/*
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* Copyright (C) 2019 Intel Corporation. All rights reserved.
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* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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*/
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.text
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.align 2
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#ifndef BH_PLATFORM_DARWIN
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.globl invokeNative
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.type invokeNative, function
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invokeNative:
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#else
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.globl _invokeNative
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_invokeNative:
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#endif /* end of BH_PLATFORM_DARWIN */
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/*
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* Arguments passed in:
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*
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* a0 function ptr
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* a1 argv
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* a2 nstacks
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*/
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/*
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* sp (stack pointer)
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* |- sd to store 64-bit values from register to memory
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* |- ld to load from stack to register
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* fp/s0 (frame pointer)
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* a0-a7 (8 integer arguments)
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* |- sd to store
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* |- ld to load
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* fa0-a7 (8 float arguments)
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* |- fsd to store
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* |- fld to load
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* t0-t6 (temporaries regisgers)
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* |- caller saved
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*/
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/* reserve space on stack to save return address and frame pointer */
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addi sp, sp, -16
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sd fp, 0(sp) /* save frame pointer */
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sd ra, 8(sp) /* save return address */
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mv fp, sp /* set frame pointer to bottom of fixed frame */
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/* save function ptr, argv & nstacks */
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mv t0, a0 /* t0 = function ptr */
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mv t1, a1 /* t1 = argv array address */
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mv t2, a2 /* t2 = nstack */
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/* fill in fa0-7 float-registers*/
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fld fa0, 0(t1) /* fa0 = argv[0] */
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fld fa1, 8(t1) /* fa1 = argv[1] */
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fld fa2, 16(t1) /* fa2 = argv[2] */
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fld fa3, 24(t1) /* fa3 = argv[3] */
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fld fa4, 32(t1) /* fa4 = argv[4] */
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fld fa5, 40(t1) /* fa5 = argv[5] */
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fld fa6, 48(t1) /* fa6 = argv[6] */
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fld fa7, 56(t1) /* fa7 = argv[7] */
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/* fill in a0-7 integer-registers*/
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ld a0, 64(t1) /* a0 = argv[8] */
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ld a1, 72(t1) /* a1 = argv[9] */
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ld a2, 80(t1) /* a2 = argv[10] */
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ld a3, 88(t1) /* a3 = argv[11] */
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ld a4, 96(t1) /* a4 = argv[12] */
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ld a5, 104(t1) /* a5 = argv[13] */
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ld a6, 112(t1) /* a6 = argv[14] */
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ld a7, 120(t1) /* a7 = argv[15] */
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addi t1, t1, 128 /* t1 points to stack args */
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/* directly call the function if no args in stack,
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x0 always holds 0 */
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beq t2, x0, call_func
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/* reserve enough stack space for function arguments */
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sll t3, t2, 3 /* shift left 3 bits. t3 = n_stacks * 8 */
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sub sp, sp, t3
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/* make 16-byte aligned */
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and sp, sp, ~(15LL)
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/* save sp in t4 register */
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mv t4, sp
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/* copy left arguments from caller stack to own frame stack */
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loop_stack_args:
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beq t2, x0, call_func
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ld t5, 0(t1) /* load stack argument, t5 = argv[i] */
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sd t5, 0(t4) /* store t5 to reseved stack, sp[j] = t5 */
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addi t1, t1, 8 /* move to next stack argument */
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addi t4, t4, 8 /* move to next stack pointer */
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addi t2, t2, -1 /* decrease t2 every loop, nstacks = nstacks -1 */
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j loop_stack_args
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call_func:
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jalr t0
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/* restore registers pushed in stack or saved in another register */
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return:
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mv sp, fp /* restore sp saved in fp before function call */
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ld fp, 0(sp) /* load previous frame poniter to fp register */
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ld ra, 8(sp) /* load previous return address to ra register */
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addi sp, sp, 16 /* pop frame, restore sp */
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jr ra
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