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Fix several issues of document, spec test script and simd (#767)

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Fix document issues: add ARC to supported targets, fix how to build wamrc for MacOS.
Fix spec case test script issue: the latest wabt has enabled simd by default, no need to
add "--enable-simd" option for test script.
Fix simd LLVM IR compilation issue: using index calculated by opcode to access array
element should not be out of array boundary, add bh_assert() for it.

Signed-off-by: Wenyong Huang <wenyong.huang@intel.com>
This commit is contained in:
Wenyong Huang
2021-09-29 11:13:38 +08:00
committed by GitHub
parent 1ad76f489b
commit b5a67cb91e
6 changed files with 25 additions and 14 deletions
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6
core/iwasm/aot/arch/aot_reloc_riscv.c
View File

@ -267,7 +267,7 @@ apply_relocation(AOTModule *module,
case R_RISCV_HI20:
{
val = (int32)(intptr_t)(symbol_addr + reloc_addend);
val = (int32)(intptr_t)((uint8 *)symbol_addr + reloc_addend);
CHECK_RELOC_OFFSET(sizeof(uint32));
if (val != (intptr_t)((uint8 *)symbol_addr + reloc_addend)) {
@ -284,7 +284,7 @@ apply_relocation(AOTModule *module,
case R_RISCV_LO12_I:
{
val = (int32)(intptr_t)(symbol_addr + reloc_addend);
val = (int32)(intptr_t)((uint8 *)symbol_addr + reloc_addend);
CHECK_RELOC_OFFSET(sizeof(uint32));
if (val != (intptr_t)((uint8 *)symbol_addr + reloc_addend)) {
@ -301,7 +301,7 @@ apply_relocation(AOTModule *module,
case R_RISCV_LO12_S:
{
val = (int32)(intptr_t)(symbol_addr + reloc_addend);
val = (int32)(intptr_t)((uint8 *)symbol_addr + reloc_addend);
CHECK_RELOC_OFFSET(sizeof(uint32));
if (val != (intptr_t)((uint8 *)symbol_addr + reloc_addend)) {

12
core/iwasm/common/wasm_c_api.c
View File

@ -2804,9 +2804,10 @@ wasm_func_call(const wasm_func_t *func,
/* copy parametes */
if (param_count
&& !(argc = params_to_argv(func->inst_comm_rt, params->data,
wasm_functype_params(func->type),
param_count, argv))) {
&& (!params
|| !(argc = params_to_argv(func->inst_comm_rt, params->data,
wasm_functype_params(func->type),
param_count, argv)))) {
goto failed;
}
@ -2825,8 +2826,9 @@ wasm_func_call(const wasm_func_t *func,
/* copy results */
if (result_count) {
if (!(argc = argv_to_results(argv, wasm_functype_results(func->type),
result_count, results->data))) {
if (!results
|| !(argc = argv_to_results(argv, wasm_functype_results(func->type),
result_count, results->data))) {
goto failed;
}
results->num_elems = result_count;

14
core/iwasm/compilation/simd/simd_load_store.c
View File

@ -82,7 +82,11 @@ aot_compile_simd_load_extend(AOTCompContext *comp_ctx,
LLVMVectorType(INT16_TYPE, 4), LLVMVectorType(INT16_TYPE, 4),
LLVMVectorType(I32_TYPE, 2), LLVMVectorType(I32_TYPE, 2),
};
LLVMTypeRef sub_vector_type = sub_vector_types[opcode_index];
LLVMTypeRef sub_vector_type;
bh_assert(opcode_index < 6);
sub_vector_type = sub_vector_types[opcode_index];
/* to vector ptr type */
if (!sub_vector_type
@ -139,6 +143,8 @@ aot_compile_simd_load_splat(AOTCompContext *comp_ctx,
LLVM_CONST(i32x2_zero),
};
bh_assert(opcode_index < 4);
if (!(element = simd_load(comp_ctx, func_ctx, align, offset,
data_lengths[opcode_index],
element_ptr_types[opcode_index]))) {
@ -179,6 +185,8 @@ aot_compile_simd_load_lane(AOTCompContext *comp_ctx,
V128_i32x4_TYPE, V128_i64x2_TYPE };
LLVMValueRef lane = simd_lane_id_to_llvm_value(comp_ctx, lane_id);
bh_assert(opcode_index < 4);
if (!(vector = simd_pop_v128_and_bitcast(
comp_ctx, func_ctx, vector_types[opcode_index], "src"))) {
return false;
@ -225,6 +233,8 @@ aot_compile_simd_load_zero(AOTCompContext *comp_ctx,
{ LLVM_CONST(i32_zero), LLVM_CONST(i32_two) },
};
bh_assert(opcode_index < 2);
if (!(element = simd_load(comp_ctx, func_ctx, align, offset,
data_lengths[opcode_index],
element_ptr_types[opcode_index]))) {
@ -320,6 +330,8 @@ aot_compile_simd_store_lane(AOTCompContext *comp_ctx,
V128_i32x4_TYPE, V128_i64x2_TYPE };
LLVMValueRef lane = simd_lane_id_to_llvm_value(comp_ctx, lane_id);
bh_assert(opcode_index < 4);
if (!(vector = simd_pop_v128_and_bitcast(
comp_ctx, func_ctx, vector_types[opcode_index], "src"))) {
return false;