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Apply aot intrinsics to riscv

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Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
Change-Id: If1e813f5f8ead2c0d9b640f8ea4e87e2155db534
This commit is contained in:
Huang Qi
2021-09-09 07:42:48 +00:00
parent 00663f0cd5
commit b31804b64e
2 changed files with 25 additions and 7 deletions
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19
core/iwasm/aot/aot_intrinsic.c
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@ -514,7 +514,7 @@ add_intrinsic_capability(AOTCompContext *comp_ctx, uint64 flag)
}
static void
add_f32_common_intrinsics_for_thumb2_fpu(AOTCompContext *comp_ctx)
add_f32_common_intrinsics(AOTCompContext *comp_ctx)
{
add_intrinsic_capability(comp_ctx, AOT_INTRINSIC_FLAG_F32_FABS);
add_intrinsic_capability(comp_ctx, AOT_INTRINSIC_FLAG_F32_FADD);
@ -526,7 +526,7 @@ add_f32_common_intrinsics_for_thumb2_fpu(AOTCompContext *comp_ctx)
}
static void
add_f64_common_intrinsics_for_thumb2_fpu(AOTCompContext *comp_ctx)
add_f64_common_intrinsics(AOTCompContext *comp_ctx)
{
add_intrinsic_capability(comp_ctx, AOT_INTRINSIC_FLAG_F64_FABS);
add_intrinsic_capability(comp_ctx, AOT_INTRINSIC_FLAG_F64_FADD);
@ -602,14 +602,23 @@ aot_intrinsic_fill_capability_flags(AOTCompContext *comp_ctx)
if (!strncmp(comp_ctx->target_arch, "thumb", 5)) {
if (!strcmp(comp_ctx->target_cpu, "cortex-m7")) {}
else if (!strcmp(comp_ctx->target_cpu, "cortex-m4")) {
add_f64_common_intrinsics_for_thumb2_fpu(comp_ctx);
add_f64_common_intrinsics(comp_ctx);
}
else {
add_f32_common_intrinsics_for_thumb2_fpu(comp_ctx);
add_f64_common_intrinsics_for_thumb2_fpu(comp_ctx);
add_f32_common_intrinsics(comp_ctx);
add_f64_common_intrinsics(comp_ctx);
add_common_float_integer_convertion(comp_ctx);
}
}
else if (!strncmp(comp_ctx->target_arch, "riscv", 5)) {
/*
* Note: Use builtin intrinsics since hardware float operation
* will cause rodata relocation
*/
add_f32_common_intrinsics(comp_ctx);
add_f64_common_intrinsics(comp_ctx);
add_common_float_integer_convertion(comp_ctx);
}
}
#endif /* WASM_ENABLE_WAMR_COMPILER != 0 || WASM_ENABLE_JIT != 0 */