diff --git a/core/iwasm/aot/aot_intrinsic.c b/core/iwasm/aot/aot_intrinsic.c
index 5fac6a50..ce28d9d5 100644
--- a/core/iwasm/aot/aot_intrinsic.c
+++ b/core/iwasm/aot/aot_intrinsic.c
@@ -514,7 +514,7 @@ add_intrinsic_capability(AOTCompContext *comp_ctx, uint64 flag)
 }
 
 static void
-add_f32_common_intrinsics_for_thumb2_fpu(AOTCompContext *comp_ctx)
+add_f32_common_intrinsics(AOTCompContext *comp_ctx)
 {
     add_intrinsic_capability(comp_ctx, AOT_INTRINSIC_FLAG_F32_FABS);
     add_intrinsic_capability(comp_ctx, AOT_INTRINSIC_FLAG_F32_FADD);
@@ -526,7 +526,7 @@ add_f32_common_intrinsics_for_thumb2_fpu(AOTCompContext *comp_ctx)
 }
 
 static void
-add_f64_common_intrinsics_for_thumb2_fpu(AOTCompContext *comp_ctx)
+add_f64_common_intrinsics(AOTCompContext *comp_ctx)
 {
     add_intrinsic_capability(comp_ctx, AOT_INTRINSIC_FLAG_F64_FABS);
     add_intrinsic_capability(comp_ctx, AOT_INTRINSIC_FLAG_F64_FADD);
@@ -602,14 +602,23 @@ aot_intrinsic_fill_capability_flags(AOTCompContext *comp_ctx)
     if (!strncmp(comp_ctx->target_arch, "thumb", 5)) {
         if (!strcmp(comp_ctx->target_cpu, "cortex-m7")) {}
         else if (!strcmp(comp_ctx->target_cpu, "cortex-m4")) {
-            add_f64_common_intrinsics_for_thumb2_fpu(comp_ctx);
+            add_f64_common_intrinsics(comp_ctx);
         }
         else {
-            add_f32_common_intrinsics_for_thumb2_fpu(comp_ctx);
-            add_f64_common_intrinsics_for_thumb2_fpu(comp_ctx);
+            add_f32_common_intrinsics(comp_ctx);
+            add_f64_common_intrinsics(comp_ctx);
             add_common_float_integer_convertion(comp_ctx);
         }
     }
+    else if (!strncmp(comp_ctx->target_arch, "riscv", 5)) {
+        /* 
+         * Note: Use builtin intrinsics since hardware float operation
+         * will cause rodata relocation
+         */
+        add_f32_common_intrinsics(comp_ctx);
+        add_f64_common_intrinsics(comp_ctx);
+        add_common_float_integer_convertion(comp_ctx);
+    }
 }
 
 #endif /* WASM_ENABLE_WAMR_COMPILER != 0 || WASM_ENABLE_JIT != 0 */
diff --git a/core/iwasm/compilation/aot_emit_numberic.c b/core/iwasm/compilation/aot_emit_numberic.c
index 29835385..147e5813 100644
--- a/core/iwasm/compilation/aot_emit_numberic.c
+++ b/core/iwasm/compilation/aot_emit_numberic.c
@@ -815,8 +815,17 @@ is_targeting_soft_float(AOTCompContext *comp_ctx, bool is_f32)
          * so user must specify '--cpu-features=-fp' to wamrc if the target
          * doesn't have or enable Floating-Point Coprocessor Option on xtensa. */
         ret = (!is_f32 || strstr(feature_string, "-fp")) ? true : false;
-    else if (is_target_riscv(comp_ctx))
-        ret = !strstr(feature_string, "+d") ? true : false;
+    else if (is_target_riscv(comp_ctx)) {
+        /*
+         * Note: Use builtin intrinsics since hardware float operation
+         * will cause rodata relocation, this will try to use hardware
+         * float unit (by return false) but handled by software finally
+         */
+        if (comp_ctx->disable_llvm_intrinsics)
+            ret = false;
+        else
+            ret = !strstr(feature_string, "+d") ? true : false;
+    }
     else
         ret = true;