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Add support for RISCV32 ILP32F (#3708)

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This commit is contained in:
Huang Qi
2024-08-15 15:17:42 +08:00
committed by GitHub
parent 000680f090
commit 58ca02bc5f
7 changed files with 71 additions and 17 deletions
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60
core/iwasm/common/wasm_runtime_common.c
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@ -4718,9 +4718,13 @@ fail:
* Implementation of wasm_runtime_invoke_native()
*/
/* The invoke native implementation on ARM platform with VFP co-processor */
/**
* The invoke native implementation on ARM platform with VFP co-processor,
* RISCV32 platform with/without FPU/DPFPU and ARC platform.
*/
#if defined(BUILD_TARGET_ARM_VFP) || defined(BUILD_TARGET_THUMB_VFP) \
|| defined(BUILD_TARGET_RISCV32_ILP32D) \
|| defined(BUILD_TARGET_RISCV32_ILP32F) \
|| defined(BUILD_TARGET_RISCV32_ILP32) || defined(BUILD_TARGET_ARC)
typedef void (*GenericFunctionPointer)();
void
@ -4821,7 +4825,8 @@ wasm_runtime_invoke_native(WASMExecEnv *exec_env, void *func_ptr,
#endif
n_ints += 2;
}
#if defined(BUILD_TARGET_RISCV32_ILP32) \
#if defined(BUILD_TARGET_RISCV32_ILP32) \
|| defined(BUILD_TARGET_RISCV32_ILP32F) \
|| defined(BUILD_TARGET_RISCV32_ILP32D) || defined(BUILD_TARGET_ARC)
/* part in register, part in stack */
else if (n_ints == MAX_REG_INTS - 1) {
@ -4843,19 +4848,32 @@ wasm_runtime_invoke_native(WASMExecEnv *exec_env, void *func_ptr,
case VALUE_TYPE_F32:
if (n_fps < MAX_REG_FLOATS)
n_fps++;
#if defined(BUILD_TARGET_RISCV32_ILP32F)
else if (n_ints < MAX_REG_INTS) {
n_ints++;
}
#endif
else
n_stacks++;
break;
case VALUE_TYPE_F64:
#if defined(BUILD_TARGET_RISCV32_ILP32) \
|| defined(BUILD_TARGET_RISCV32_ILP32F) || defined(BUILD_TARGET_ARC)
if (n_ints < MAX_REG_INTS - 1) {
n_ints += 2;
}
else if (n_ints == MAX_REG_INTS - 1) {
n_ints++;
n_stacks++;
}
#endif
#if defined(BUILD_TARGET_ARM_VFP) || defined(BUILD_TARGET_THUMB_VFP)
if (n_fps < MAX_REG_FLOATS - 1) {
#if !defined(BUILD_TARGET_RISCV32_ILP32) && !defined(BUILD_TARGET_ARC)
/* 64-bit data must be 8 bytes aligned in arm */
if (n_fps & 1)
n_fps++;
#endif
n_fps += 2;
}
#if defined(BUILD_TARGET_RISCV32_ILP32) || defined(BUILD_TARGET_ARC)
else if (n_fps == MAX_REG_FLOATS - 1) {
n_fps++;
n_stacks++;
@ -4887,7 +4905,7 @@ wasm_runtime_invoke_native(WASMExecEnv *exec_env, void *func_ptr,
/* use int regs firstly if available */
if (n_ints & 1)
n_ints++;
ints += 2;
n_ints += 2;
}
else {
/* 64-bit data in stack must be 8 bytes aligned in riscv32
@ -4911,7 +4929,8 @@ wasm_runtime_invoke_native(WASMExecEnv *exec_env, void *func_ptr,
n_stacks++;
}
#if defined(BUILD_TARGET_ARM_VFP) || defined(BUILD_TARGET_THUMB_VFP)
#if defined(BUILD_TARGET_ARM_VFP) || defined(BUILD_TARGET_THUMB_VFP) \
|| defined(BUILD_TARGET_RISCV32_ILP32F)
argc1 = MAX_REG_INTS + MAX_REG_FLOATS + n_stacks;
#elif defined(BUILD_TARGET_RISCV32_ILP32) || defined(BUILD_TARGET_ARC)
argc1 = MAX_REG_INTS + n_stacks;
@ -4928,7 +4947,8 @@ wasm_runtime_invoke_native(WASMExecEnv *exec_env, void *func_ptr,
}
ints = argv1;
#if defined(BUILD_TARGET_ARM_VFP) || defined(BUILD_TARGET_THUMB_VFP)
#if defined(BUILD_TARGET_ARM_VFP) || defined(BUILD_TARGET_THUMB_VFP) \
|| defined(BUILD_TARGET_RISCV32_ILP32F)
fps = ints + MAX_REG_INTS;
stacks = fps + MAX_REG_FLOATS;
#elif defined(BUILD_TARGET_RISCV32_ILP32) || defined(BUILD_TARGET_ARC)
@ -5018,7 +5038,8 @@ wasm_runtime_invoke_native(WASMExecEnv *exec_env, void *func_ptr,
ints[n_ints++] = *argv_src++;
ints[n_ints++] = *argv_src++;
}
#if defined(BUILD_TARGET_RISCV32_ILP32) \
#if defined(BUILD_TARGET_RISCV32_ILP32) \
|| defined(BUILD_TARGET_RISCV32_ILP32F) \
|| defined(BUILD_TARGET_RISCV32_ILP32D) || defined(BUILD_TARGET_ARC)
else if (n_ints == MAX_REG_INTS - 1) {
ints[n_ints++] = *argv_src++;
@ -5042,22 +5063,36 @@ wasm_runtime_invoke_native(WASMExecEnv *exec_env, void *func_ptr,
{
if (n_fps < MAX_REG_FLOATS)
*(float32 *)&fps[n_fps++] = *(float32 *)argv_src++;
#if defined(BUILD_TARGET_RISCV32_ILP32F)
else if (n_ints < MAX_REG_INTS) {
ints[n_ints++] = *argv_src++;
}
#endif
else
*(float32 *)&stacks[n_stacks++] = *(float32 *)argv_src++;
break;
}
case VALUE_TYPE_F64:
{
#if defined(BUILD_TARGET_RISCV32_ILP32) \
|| defined(BUILD_TARGET_RISCV32_ILP32F) || defined(BUILD_TARGET_ARC)
if (n_ints < MAX_REG_INTS - 1) {
ints[n_ints++] = *argv_src++;
ints[n_ints++] = *argv_src++;
}
else if (n_ints == MAX_REG_INTS - 1) {
ints[n_ints++] = *argv_src++;
stacks[n_stacks++] = *argv_src++;
}
#endif
#if defined(BUILD_TARGET_ARM_VFP) || defined(BUILD_TARGET_THUMB_VFP)
if (n_fps < MAX_REG_FLOATS - 1) {
#if !defined(BUILD_TARGET_RISCV32_ILP32) && !defined(BUILD_TARGET_ARC)
/* 64-bit data must be 8 bytes aligned in arm */
if (n_fps & 1)
n_fps++;
#endif
fps[n_fps++] = *argv_src++;
fps[n_fps++] = *argv_src++;
}
#if defined(BUILD_TARGET_RISCV32_ILP32) || defined(BUILD_TARGET_ARC)
else if (n_fps == MAX_REG_FLOATS - 1) {
fps[n_fps++] = *argv_src++;
stacks[n_stacks++] = *argv_src++;
@ -5249,6 +5284,7 @@ fail:
#endif /* end of defined(BUILD_TARGET_ARM_VFP) \
|| defined(BUILD_TARGET_THUMB_VFP) \
|| defined(BUILD_TARGET_RISCV32_ILP32D) \
|| defined(BUILD_TARGET_RISCV32_ILP32F) \
|| defined(BUILD_TARGET_RISCV32_ILP32) \
|| defined(BUILD_TARGET_ARC) */