christoph/quartus-8-bit-cpu
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Add arg outputs to Controller

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Christoph Urlacher
2023-03-30 13:19:12 +02:00
parent 139674163b
commit c59eec85d1
1 changed files with 4 additions and 3 deletions
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7
Controller.sv
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@ -6,6 +6,10 @@ module Controller(
input var logic[7:0] databus, input var logic[7:0] databus,
output var logic[1:0] opcode, output var logic[1:0] opcode,
output var logic[5:0] arg,
output var logic[2:0] arg0,
output var logic[2:0] arg1,
output var logic regs_set, output var logic regs_set,
output var logic[2:0] regs_savesel, output var logic[2:0] regs_savesel,
output var logic[2:0] regs_loadsel, output var logic[2:0] regs_loadsel,
@ -14,9 +18,6 @@ module Controller(
output var logic pc_set output var logic pc_set
); );
var logic[5:0] arg;
var logic[2:0] arg0;
var logic[2:0] arg1;
assign opcode = databus[7:6]; assign opcode = databus[7:6];
assign arg = databus[5:0]; assign arg = databus[5:0];
assign arg0 = databus[2:0]; assign arg0 = databus[2:0];