1

Reformat Counter

This commit is contained in:
2023-03-29 16:03:48 +02:00
parent a06dca25c7
commit 259d7949d4

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@ -11,7 +11,7 @@ module Counter
var logic[WIDTH-1:0] countervalue;
always @(posedge clock or posedge reset)
always @(posedge clock or posedge reset) begin
if (reset) begin
// Reset the counter to 0
countervalue <= '0;
@ -32,6 +32,7 @@ module Counter
countervalue <= countervalue - 1;
end
end
end
assign binout = countervalue;
endmodule