diff --git a/README.md b/README.md
index 9c1b63a..f65386d 100644
--- a/README.md
+++ b/README.md
@@ -16,6 +16,33 @@ The CPU has 6 Registers:
The program is read from a readonly memory (ROM).
+#### Instruction Reference:
+
+The Instruction/Data share 8-bit, the instruction mode is specified by bits 6 and 7, so there is a total of 4 modes:
+
+| Bit | Value | Description |
+|-----|--------|-----------------------|
+| 6:7 | 00 | Constant loading mode |
+| 0:5 | xxxxxx | Number value |
+
+| Bit | Value | Description |
+|-----|----------------------------------------|----------------------------------------|
+| 6:7 | 01 | ALU mode |
+| 3:5 | 000 | Reserved |
+| 0:2 | 000
001
010
011
100
101 | And
Or
Nand
Nor
Add
Sub |
+
+| Bit | Value | Description |
+|-----|-------|---------------------------|
+| 6:7 | 10 | Copy mode |
+| 3:5 | xxx | Source register or input |
+| 0:2 | xxx | Target register or output |
+
+| Bit | Value | Description |
+|-----|------------------------------------------------------|-----------------------------------------------------------------|
+| 6:7 | 11 | Jump mode |
+| 3:5 | 000 | Reserved |
+| 0:2 | 000
001
010
011
100
101
110
111 | Never
== 0
< 0
<= 0
Always
!= 0
> 0
>= 0 |
+
## Programming
In [this repository](https://gitlab.com/ChUrl/logisim-assembler) I implemented a simple assembler, to make programming the CPUs easier.