27 lines
929 B
TeX
27 lines
929 B
TeX
\chapter{Figures}
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\label{ch:figures}
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\clearpage
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\begin{figure}[H]
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\centering
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\begin{subfigure}[b]{0.85\textwidth}
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\includesvg[width=1.0\linewidth]{diagrams/apic_enable_seq.svg}
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\end{subfigure}
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\caption{Enabling the APIC Subsystem.}
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\label{fig:apicenable}
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\end{figure}
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\begin{figure}[H]
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\centering
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\begin{subfigure}[b]{0.85\textwidth}
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\includesvg[width=1.0\linewidth]{diagrams/apic_smp_enable_seq.svg}
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\end{subfigure}
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\caption{Starting SMP Operation.}
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\label{fig:smpenable}
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\end{figure}
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Note that this diagram is slightly misleading, because the application processor runs in parallel and is not susceptible to delays on the BSP\@.
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Initialization of the AP's local APIC follows the sequence described by \autoref{fig:apicenable} (starting at "Actual Component Initialization", excluding the I/O APIC, error handler instantiation and timer calibration).
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\cleardoublepage |