\chapter{Figures}
\label{ch:figures}

\clearpage

\begin{figure}[H]
    \centering
    \begin{subfigure}[b]{0.85\textwidth}
        \includesvg[width=1.0\linewidth]{diagrams/apic_enable_seq.svg}
    \end{subfigure}
    \caption{Enabling the APIC Subsystem.}
    \label{fig:apicenable}
\end{figure}

\begin{figure}[H]
    \centering
    \begin{subfigure}[b]{0.85\textwidth}
        \includesvg[width=1.0\linewidth]{diagrams/apic_smp_enable_seq.svg}
    \end{subfigure}
    \caption{Starting SMP Operation.}
    \label{fig:smpenable}
\end{figure}

Note that this diagram is slightly misleading, because the application processor runs in parallel and is not susceptible to delays on the BSP\@.
Initialization of the AP's local APIC follows the sequence described by \autoref{fig:apicenable} (starting at "Actual Component Initialization", excluding the I/O APIC, error handler instantiation and timer calibration).

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