christoph/interrupt-handling-using-the-x86-apic
1
Fork 0
Code Actions Activity

Final pre-release

Browse Source
This commit is contained in:
Christoph Urlacher
2023-03-02 17:29:30 +01:00
parent 01b1be0629
commit 3f02dfd309
47 changed files with 4803 additions and 1836 deletions
Download Patch File Download Diff File Expand all files Collapse all files

32
chap/introduction.tex
View File

@ -1,26 +1,20 @@
\chapter{Introduction}
\label{ch:introduction}
Computer systems are very useful, because they are able to interact with the ``outside world'', for
instance by reading values from sensors, controlling external appliances or interacting with a user
through human interface devices. In each of these scenarios, the system's CPU has to react to
``external changes'', like a key press or sensor reading. An efficient hardware solution to this
problem are ``interrupts''.
\clearpage
In this thesis, support for the ``APIC'', a modern and widely used interrupt controller
architecture, introduced by Intel for the Pentium 4 processor, will be implemented into hhuOS, ``A
small operating system for learning purposes''~\cite{hhuos}. This support will cover a complete
replacement of the older ``PIC'' interrupt controller, introduction of an alternative timer - a
part of the APIC architecture - for scheduling, and utilizing the APIC to boot multiprocessor
systems.
Computer systems need to interact with their surroundings, for instance by reading values from sensors, controlling external appliances or interacting with a user through human interface devices.
In each of these scenarios, the system's CPU has to react to \textquote{external changes}, like a key press or sensor reading.
An efficient hardware solution to this problem are \textquote{interrupts}.
The following chapter explains important background concepts, in \autoref{ch:implementation} the
required steps to use the APIC and their implementation are explained in general,
\autoref{ch:verification} deals with the verification process of the developed software on emulated
and real hardware, and \autoref{ch:conclusion} draws conclusions regarding the previous
implementation and future improvements.
Through the past, interrupt hardware went through different iterations: Intel introduced the \textquote{Programmable Interrupt Controller} for the \textquote{8085} processor in 1976, with a revised version for the \textquote{8086} processor.
With modern standards like multicore processors, peripheral extendability, greater flexibility or higher performance, the Programmable Interrupt Controller could no longer meet its requirements.
Specific details on the code created during this thesis are given in \autoref{ch:listings},
separated from the main body.
In this thesis, support for the \textquote{Advanced Programmable Interrupt Controller}, a modern, multiprocessing capable and widely used interrupt controller architecture, introduced by Intel for the x86 \textquote{i486} processor, will be implemented into hhuOS, \textquote{A small operating system for learning purposes}~\autocite{hhuos}.
This support will cover a complete replacement of the older Programmable Interrupt Controller, introduction of an alternative timer -- a part of the APIC architecture -- for scheduling, and utilizing the APIC to boot multiprocessor systems.
\clearpage
The following chapter explains important background concepts, in \autoref{ch:implementation} the required steps to use the APIC and their implementation are explained in general, \autoref{ch:verification} deals with the verification process of the developed software on emulated and real hardware, and \autoref{ch:conclusion} draws conclusions regarding the previous implementation and future improvements.
Specific details on the code created during this thesis are given in \autoref{ch:listings}, separated from the main body.
\cleardoublepage