141 lines
3.5 KiB
C
141 lines
3.5 KiB
C
/*
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Paparazzi mcu0 cmx469 modem functions
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Copyright (C) 2003 Pascal Brisset, Antoine Drouin
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This file is part of paparazzi.
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paparazzi is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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paparazzi is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with paparazzi; see the file COPYING. If not, write to
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the Free Software Foundation, 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA.
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*/
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#ifndef MODEM_H
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#define MODEM_H
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#include "airframe.h"
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void modem_init( void );
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extern uint8_t modem_nb_ovrn;
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#define TX_BUF_SIZE 255
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extern uint8_t tx_head;
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extern volatile uint8_t tx_tail;
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extern uint8_t tx_buf[ TX_BUF_SIZE ];
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extern uint8_t tx_byte;
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extern uint8_t tx_byte_idx;
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extern uint8_t ck_a, ck_b;
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#define ModemStartMessage(id) \
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{ MODEM_PUT_1_BYTE(STX); MODEM_PUT_1_BYTE(id); ck_a = id; ck_b = id; }
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#define ModemEndMessage() \
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{ MODEM_PUT_1_BYTE(ck_a); MODEM_PUT_1_BYTE(ck_b); MODEM_CHECK_RUNNING(); }
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#define MODEM_TX_PORT PORTD
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#define MODEM_TX_DDR DDRD
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#define MODEM_TX_EN 7
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#define MODEM_TX_DATA 6
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#ifdef CTL_BRD_V1_1
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#define MODEM_CLK_DDR DDRD
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#define MODEM_CLK_PORT PORTD
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#define MODEM_CLK 0
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#define MODEM_CLK_INT INT0
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#define MODEM_CLK_INT_REG EICRA
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#define MODEM_CLK_INT_CFG _BV(ISC01)
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#define MODEM_CLK_INT_SIG SIG_INTERRUPT0
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#endif /* CTL_BRD_V1_1 */
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#ifdef CTL_BRD_V1_2
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#define MODEM_CLK_DDR DDRD
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#define MODEM_CLK_PORT PORTD
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#define MODEM_CLK 0
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#define MODEM_CLK_INT INT0
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#define MODEM_CLK_INT_REG EICRA
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#define MODEM_CLK_INT_CFG _BV(ISC01)
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#define MODEM_CLK_INT_SIG SIG_INTERRUPT0
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#define MODEM_OSC_DDR DDRB
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#define MODEM_OSC_PORT PORTB
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#define MODEM_OSC 4
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#endif /* CTL_BRD_V1_2 */
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#ifdef CTL_BRD_V1_2_1
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#define MODEM_CLK_DDR DDRE
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#define MODEM_CLK_PORT PORTE
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#define MODEM_CLK 4
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#define MODEM_CLK_INT INT4
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#define MODEM_CLK_INT_REG EICRB
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#define MODEM_CLK_INT_CFG _BV(ISC41)
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#define MODEM_CLK_INT_SIG SIG_INTERRUPT4
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#define MODEM_OSC_DDR DDRB
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#define MODEM_OSC_PORT PORTB
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#define MODEM_OSC 4
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#endif /* CTL_BRD_V1_2_1 */
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#define MODEM_CHECK_FREE_SPACE(_space) (tx_head>=tx_tail? _space < (TX_BUF_SIZE - (tx_head - tx_tail)) : _space < (tx_tail - tx_head))
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#define MODEM_PUT_1_BYTE(_byte) { \
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tx_buf[tx_head] = _byte; \
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tx_head++; \
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if (tx_head >= TX_BUF_SIZE) tx_head = 0; \
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}
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#define MODEM_PUT_1_BYTE_BY_ADDR(_byte) { \
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tx_buf[tx_head] = *(_byte); \
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ck_a += *(_byte); \
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ck_b += ck_a; \
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tx_head++; \
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if (tx_head >= TX_BUF_SIZE) tx_head = 0; \
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}
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#define MODEM_PUT_2_BYTE_BY_ADDR(_byte) { \
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MODEM_PUT_1_BYTE_BY_ADDR(_byte); \
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MODEM_PUT_1_BYTE_BY_ADDR(_byte+1); \
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}
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#define MODEM_PUT_4_BYTE_BY_ADDR(_byte) { \
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MODEM_PUT_1_BYTE_BY_ADDR(_byte); \
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MODEM_PUT_1_BYTE_BY_ADDR(_byte+1); \
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MODEM_PUT_1_BYTE_BY_ADDR(_byte+2); \
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MODEM_PUT_1_BYTE_BY_ADDR(_byte+3); \
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}
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#define MODEM_LOAD_NEXT_BYTE() { \
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tx_byte = tx_buf[tx_tail]; \
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tx_byte_idx = 0; \
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tx_tail++; \
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if( tx_tail >= TX_BUF_SIZE ) \
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tx_tail = 0; \
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}
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#define MODEM_CHECK_RUNNING() { \
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if (!(EIMSK & _BV(MODEM_CLK_INT))) { \
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MODEM_LOAD_NEXT_BYTE() \
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sbi(EIFR, INTF0); \
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sbi(EIMSK, MODEM_CLK_INT); \
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} \
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}
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#endif /* MODEM_H */
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