b052c0494b
- The register manager is gone. It's functionality is now encapsulated in the CPU classes. - For the client, there is the ConcreteCPU class that encapsulates the access to the CPU state (including registers) and architecture details. The correspondig objects for the CPUs inside the simulator can be accessed through the SimulatorController.getCPU() function. - Listener got a new ConcreteCPU* member to filter for which CPU the events should fire. The default NULL is used as wildcard for all aviable CPUs. The events respectively got a ConcreteCPU* member to indicate which CPU really fired the event. - For the server, there is CPUArchitecture to access the architecture details. git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1966 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
33 lines
595 B
Plaintext
33 lines
595 B
Plaintext
*.o
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*.a
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*.d
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*.acc
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*.pb.h
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*.pb.cc
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*.gcda
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*.pyc
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*~
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Makefile
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build
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build-*
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simulators/bochs/autom4te.cache/
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simulators/bochs/bochs
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simulators/bochs/build/linux/bochs-dlx
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simulators/bochs/build/macosx/Info.plist
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simulators/bochs/build/win32/nsis/bochs.nsi
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simulators/bochs/bxcommit
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simulators/bochs/bximage
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simulators/bochs/bxversion.h
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simulators/bochs/bxversion.rc
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simulators/bochs/config.h
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simulators/bochs/config.log
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simulators/bochs/config.status
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simulators/bochs/libtool
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simulators/bochs/ltdlconf.h
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!simulators/bochs/plex86/kernel/freebsd/Makefile
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simulators/gem5/.hg
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simulators/gem5/m5out/
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