c086800e58
Added opcode parser of the F.E.H.L.E.R-project for analysis of memory access in mmu-abort handling, tracing, etc. Change-Id: I5912fa4a4d51ee0501817c43bae05e87ac0e9b90
143 lines
3.0 KiB
C
143 lines
3.0 KiB
C
/*
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* FAME - Fault Aware Micro-hypervisor Environment
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*
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* Author: Andreas Heinig <andreas.heinig@gmx.de>
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*
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* Copyright (C) 2011,2012 Department of Computer Science,
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* Design Automation of Embedded Systems Group
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* Dortmund University of Technology
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*
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* This program is proprietary software: you must not redistribute it.
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* Using this software is only allowed inside the DFG SPP1500 F.E.H.L.E.R project,
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* ls12-www.cs.tu-dortmund.de/daes/forschung/dependable-embedded-real-time-systems
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*
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* The complete license is depicted in the LICENSE file in the top level folder.
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*/
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#include <stdio.h>
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#include "arm-opcode.h"
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#define SVC_INSTRUCTION_MASK 0x0F000000
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#define SVC_INSTRUCTION_SIG 0x0F000000
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#define BKPT_INSTRUCTION_MASK 0x0FF000F0
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#define BKPT_INSTRUCTION_SIG 0x01200070
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#define MRR_INSTRUCTIONS_MASK 0x0FE00000
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#define MRR_INSTRUCTIONS_SIG 0x0C400000
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#define MR_INSTRUCTIONS_MASK 0x0F000010
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#define MR_INSTRUCTIONS_SIG 0x0E000010
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#define CDP_INSTRUCTION_MASK 0x0F000010
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#define CDP_INSTRUCTION_SIG 0x0E000000
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int decode_coprocessor(arm_instruction_t * op)
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{
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uint32_t inst = op->inst;
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/* possible registers */
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uint32_t rn = (inst >> 16) & 0xF;
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uint32_t rd = (inst >> 12) & 0xF;
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uint32_t crm = (inst) & 0xF;
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uint32_t cp_num = (inst >> 8) & 0xF;
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/*
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* Software interrupt ?
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*/
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if((inst & SVC_INSTRUCTION_MASK) == SVC_INSTRUCTION_SIG)
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{
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OP_PRINTF("SVC\t%d\n", (int)(inst & 0x00FFFFFF))
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return 0;
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}
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/*
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* Break point ?
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*/
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if((inst & BKPT_INSTRUCTION_MASK) == BKPT_INSTRUCTION_SIG)
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{
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OP_PRINTF("BKPT\t%d\n", (int)(((inst & 0x000FFF00) >> 8) | (inst & 0xF)))
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return 0;
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}
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/*
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* MCRR / MRRC ?
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*/
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if((inst & MRR_INSTRUCTIONS_MASK) == MRR_INSTRUCTIONS_SIG)
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{
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if(_L_SET)
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{
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arm_op_add_reg_w(op, rd);
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arm_op_add_reg_w(op, rn);
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OP_PRINTF("MRRC")
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}
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else
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{
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arm_op_add_reg_r(op, rd);
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arm_op_add_reg_r(op, rn);
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OP_PRINTF("MCRR")
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}
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OP_PRINTF("\tp%d, %d, R%d, R%d, CR%d\n", (int)cp_num, (int)((inst >> 4) & 0xF), (int)rd, (int)rn, (int)crm)
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return 0;
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}
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/*
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* MCR / MRC ?
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*/
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if((inst & MR_INSTRUCTIONS_MASK) == MR_INSTRUCTIONS_SIG)
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{
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if(_L_SET)
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{
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arm_op_add_reg_w(op, rd);
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OP_PRINTF("MRC")
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}
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else
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{
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arm_op_add_reg_r(op, rd);
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OP_PRINTF("MCR")
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}
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OP_PRINTF("\tp%d, %d, R%d, CR%d, CR%d, {%d}\n", (int)cp_num, (int)((inst >> 21) & 0x7), (int)rd, (int)rn, (int)crm, (int)((inst >> 5) & 0x7))
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return 0;
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}
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/*
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* CDP ?
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*/
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if((inst & CDP_INSTRUCTION_MASK) == CDP_INSTRUCTION_SIG)
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{
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OP_PRINTF("CDP\tp%d, %d, CR%d, CR%d, CR%d, {%d}\n", (int)cp_num, (int)((inst >> 20) & 0xF), (int)rd, (int)rn, (int)crm, (int)((inst >> 5) & 0x7))
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return 0;
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}
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/*
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* LDC / STC ?
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*/
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if(BIT_IS_CLEAR(25))
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{
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if(_L_SET)
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OP_PRINTF("LDC")
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else
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OP_PRINTF("STC")
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if(BIT_IS_SET(22))
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OP_PRINTF("L")
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OP_PRINTF("\tp%d, CR%d, ", (int)cp_num, (int)rd)
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decode_addressing_mode5(op);
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OP_PRINTF("\n")
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return 0;
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}
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printf("\n%d: CANNOT parse %08x\n", __LINE__, (unsigned int)inst);
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return 1;
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}
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