83d72a091e
Initial check-in of openocd-0.7.0 as it can be downloaded from http://sourceforge.net/projects/openocd/files/openocd/0.7.0/ Any modifications will follow. Change-Id: I6949beaefd589e046395ea0cb80f4e1ab1654d55
49 lines
1.1 KiB
INI
49 lines
1.1 KiB
INI
# Target configuration for the Samsung 2450 system on chip
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# Processor : ARM926ejs (wb) rev 0 (v4l)
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# Info: JTAG tap: s3c2450.cpu tap/device found: 0x07926F0F
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# FIX!!! what to use here?
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#
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# RCLK?
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#
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# adapter_khz 0
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#
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# Really low clock during reset?
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#
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# adapter_khz 1
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME s3c2450
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}
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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# this defaults to a bigendian
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set _ENDIAN little
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}
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if { [info exists CPUTAPID] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x07926f0f
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}
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#jtag scan chain
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0xE -irmask 0x0f -expected-id $_CPUTAPID
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
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# FIX!!!!! should this really use srst_pulls_trst?
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# With srst_pulls_trst "reset halt" will not reset into the
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# halted mode, but rather "reset run" and then halt the target.
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#
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# However, without "srst_pulls_trst", then "reset halt" produces weird
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# errors:
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# WARNING: unknown debug reason: 0x0
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reset_config trst_and_srst
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