83d72a091e
Initial check-in of openocd-0.7.0 as it can be downloaded from http://sourceforge.net/projects/openocd/files/openocd/0.7.0/ Any modifications will follow. Change-Id: I6949beaefd589e046395ea0cb80f4e1ab1654d55
73 lines
1.7 KiB
INI
73 lines
1.7 KiB
INI
# Script for freescale DSP568037
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME dsp568037
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}
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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# this defaults to a big endian
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set _ENDIAN little
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}
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if { [info exists CPUTAPID] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x01f2801d
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}
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#jtag speed
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adapter_khz 800
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reset_config srst_only
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#MASTER tap
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jtag newtap $_CHIPNAME chp -irlen 8 -ircapture 1 -irmask 0x03 -expected-id $_CPUTAPID
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#CORE tap
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 1 -irmask 0x03 -disable -expected-id 0x02211004
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#target configuration - There is only 1 tap at a time, hence only 1 target is defined.
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME dsp5680xx -endian $_ENDIAN -chain-position $_TARGETNAME
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# Setup the interesting tap
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jtag configure $_CHIPNAME.chp -event setup "jtag tapenable $_TARGETNAME"
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#select CORE tap by modifying the TLM register.
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#to be used when MASTER tap is selected.
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jtag configure $_TARGETNAME -event tap-enable "
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irscan $_CHIPNAME.chp 0x05;
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drscan $_CHIPNAME.chp 4 0x02;
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jtag tapdisable $_CHIPNAME.chp;
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"
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#select MASTER tap by modifying the TLM register.
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#to be used when CORE tap is selected.
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jtag configure $_CHIPNAME.chp -event tap-enable "
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irscan $_TARGETNAME 0x08;
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drscan $_TARGETNAME 4 0x1;
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jtag tapdisable $_TARGETNAME;
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"
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#disables the master tap
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jtag configure $_TARGETNAME -event tap-disable "
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"
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#TODO FIND SMARTER WAY.
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jtag configure $_CHIPNAME.chp -event tap-disable "
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"
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#TODO FIND SMARTER WAY.
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#working area at base of ram
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$_TARGETNAME configure -work-area-virt 0
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#setup flash
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME dsp5680xx_flash 0 0 2 1 $_TARGETNAME
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