b60e1c0c66
This change introduces a fake iobus device into gem5 to prevent it from crashing on bogus I/O memory accesses. Change-Id: Ie69e3191bdd917cc681269852937a5a3820a93fb
71 lines
1.5 KiB
C++
71 lines
1.5 KiB
C++
#include "base/trace.hh"
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#include "debug/Fail.hh"
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#include "dev/fail_fake_device.hh"
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#include "mem/packet.hh"
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#include "mem/packet_access.hh"
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#include "sim/system.hh"
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#include "config/FailConfig.hpp"
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#include "sal/SALInst.hpp"
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using namespace std;
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FailFakeDevice::FailFakeDevice(Params *p)
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: BasicPioDevice(p)
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{
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if (!p->ret_bad_addr)
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pioSize = p->pio_size;
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retData8 = p->ret_data8;
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retData16 = p->ret_data16;
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retData32 = p->ret_data32;
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retData64 = p->ret_data64;
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}
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Tick
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FailFakeDevice::read(PacketPtr pkt)
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{
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pkt->allocate();
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pkt->makeAtomicResponse();
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DPRINTF(Fail, "[FAIL] dev/fail_fake_device.cc read(): fake response\n");
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switch (pkt->getSize()) {
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case sizeof(uint64_t):
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pkt->set(retData64);
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break;
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case sizeof(uint32_t):
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pkt->set(retData32);
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break;
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case sizeof(uint16_t):
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pkt->set(retData16);
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break;
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case sizeof(uint8_t):
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pkt->set(retData8);
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break;
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default:
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if (params()->fake_mem)
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std::memset(pkt->getPtr<uint8_t>(), 0, pkt->getSize());
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else
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panic("invalid access size! Device being accessed by cache?\n");
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}
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return pioDelay;
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}
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Tick
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FailFakeDevice::write(PacketPtr pkt)
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{
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pkt->makeAtomicResponse();
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DPRINTF(Fail, "[FAIL] dev/fail_fake_device.cc write(): fake response\n");
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return pioDelay;
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}
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FailFakeDevice *
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FailFakeDeviceParams::create()
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{
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return new FailFakeDevice(this);
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}
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