2575604b41
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1321 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
129 lines
3.3 KiB
C
129 lines
3.3 KiB
C
/*
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* Copyright (c) 2005-2011 Imperas Software Ltd., www.imperas.com
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*
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* YOUR ACCESS TO THE INFORMATION IN THIS MODEL IS CONDITIONAL
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* UPON YOUR ACCEPTANCE THAT YOU WILL NOT USE OR PERMIT OTHERS
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* TO USE THE INFORMATION FOR THE PURPOSES OF DETERMINING WHETHER
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* IMPLEMENTATIONS OF THE ARM ARCHITECTURE INFRINGE ANY THIRD
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* PARTY PATENTS.
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*
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* THE LICENSE BELOW EXTENDS ONLY TO USE OF THE SOFTWARE FOR
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* MODELING PURPOSES AND SHALL NOT BE CONSTRUED AS GRANTING
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* A LICENSE TO CREATE A HARDWARE IMPLEMENTATION OF THE
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* FUNCTIONALITY OF THE SOFTWARE LICENSED HEREUNDER.
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* YOU MAY USE THE SOFTWARE SUBJECT TO THE LICENSE TERMS BELOW
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* PROVIDED THAT YOU ENSURE THAT THIS NOTICE IS REPLICATED UNMODIFIED
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* AND IN ITS ENTIRETY IN ALL DISTRIBUTIONS OF THE SOFTWARE,
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* MODIFIED OR UNMODIFIED, IN SOURCE CODE OR IN BINARY FORM.
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*
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* Licensed under an Imperas Modfied Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.ovpworld.org/licenses/OVP_MODIFIED_1.0_APACHE_OPEN_SOURCE_LICENSE_2.0.pdf
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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* either express or implied.
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*
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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*/
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#ifndef ARM_SYS_H
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#define ARM_SYS_H
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// VMI header files
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#include "vmi/vmiTypes.h"
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// model header files
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#include "armSysRegisters.h"
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#include "armTypeRefs.h"
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//
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// These are the bounds of the Peripheral region
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//
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#define PERIPH_LOW 0x40000000
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#define PERIPH_HIGH 0x4fffffff
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//
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// These are the bounds of the System Control Space
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//
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#define DEVICE_LOW 0xa0000000
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#define DEVICE_HIGH 0xdfffffff
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//
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// These are the bounds of the System Control Space
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//
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#define SYSTEM_LOW 0xe0000000
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#define SYSTEM_HIGH 0xffffffff
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//
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// These are the bounds of the Private Peripheral Bus
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//
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#define PPB_LOW 0xe0000000
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#define PPB_HIGH 0xe00fffff
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//
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// Call on initialization
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//
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void armSysInitialize(armP arm);
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//
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// Call on reset
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//
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void armSysReset(armP arm);
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//
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// Is the indicated system register supported on this processor?
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//
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Bool armGetSysRegSupported(armSCSRegId id, armP arm);
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//
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// Perform a privileged-mode read of the system register
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//
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Bool armReadSysRegPriv(armSCSRegId id, armP arm, Uns32 *result);
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//
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// Perform a privileged-mode write of the system register
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//
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Bool armWriteSysRegPriv(armSCSRegId id, armP arm, Uns32 value);
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//
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// Add programmer's view of system register
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//
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void armAddSysRegisterView(
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armSCSRegId id,
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armP arm,
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vmiViewObjectP baseObject,
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const char *name
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);
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//
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// Structure filled with system register description by
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// armGetSysRegisterDesc
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//
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typedef struct armSysRegDescS {
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const char *name;
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armSCSRegId id;
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Uns32 address;
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const char *privRW;
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const char *userRW;
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} armSysRegDesc, *armSysRegDescP;
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//
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// Iterator filling 'desc' with the next system register description -
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// 'desc.name' should be initialized to NULL prior to the first call
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//
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Bool armGetSysRegisterDesc(armSysRegDescP desc);
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//
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// Insert SCS region into the passed domain at the standard location
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//
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void armSysCreateSCSRegion(armP arm, memDomainP domain);
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#endif
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