96bc39c05d
The T32 can simulate bare instruction sets without periphery. For the Cortex-M3 we have complete NVIC model including Systick Timer. Currently a simple CiAO can run on the simulator. TODO: - Let memlogger log all memory accesses. - Interact with FailT32 for a complete simulation/FI
11 lines
248 B
CMake
11 lines
248 B
CMake
# NVIC simulation model for the T32
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set(SRCS
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memlogger.c
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../include/simul.c
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)
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add_library(memlogger SHARED ${SRCS})
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GET_TARGET_PROPERTY(__T32_MEMLOGGER_LIB memlogger LOCATION)
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SET(T32_MEMLOGGER_LIB "${__T32_MEMLOGGER_LIB}" CACHE INTERNAL "")
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