96bc39c05d
The T32 can simulate bare instruction sets without periphery. For the Cortex-M3 we have complete NVIC model including Systick Timer. Currently a simple CiAO can run on the simulator. TODO: - Let memlogger log all memory accesses. - Interact with FailT32 for a complete simulation/FI
18 lines
428 B
CMake
18 lines
428 B
CMake
# NVIC simulation model for the T32
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set(SRCS
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nvic.c
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../../include/simul.c # TODO we need a simul.c anywhere...
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nvic_id_space.c
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nvic_interrupt_type.c
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nvic_nvic.c
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nvic_software_trigger.c
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nvic_system_control_block.c
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nvic_system_control_block_cpuid.c
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nvic_system_timer.c
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)
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add_library(nvic SHARED ${SRCS})
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GET_TARGET_PROPERTY(__T32_NVIC_LIB nvic LOCATION)
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SET(T32_NVIC_LIB "${__T32_NVIC_LIB}" CACHE INTERNAL "")
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