0799e52fde
Internal LLVM register IDs can and did change between LLVM versions. These magic integers are replaced by iterating over all LLVM registers and mapping them to FAIL* registers by name. As this iteration requires a LLVM object created from a binary, a static convenience function is added to LLVMtoFailTranslator which creates a translator given the binary filename. Building this functionality inside libfail-llvmdisassembler prevents experiments from needing to add LLVM includes and library definitions. Change-Id: I27927f40d5cb6d9a22bb2caf21ca2450f6bcb0b8
35 lines
1.1 KiB
C++
35 lines
1.1 KiB
C++
#include "LLVMDisassembler.hpp"
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#include "LLVMtoFailGem5.hpp"
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#include "sal/arm/ArmArchitecture.hpp"
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using namespace fail;
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LLVMtoFailGem5::LLVMtoFailGem5(LLVMDisassembler *disas) {
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std::map<std::string, struct reginfo_t> reg_name_map;
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reg_name_map["R0"] = reginfo_t(RI_R0);
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reg_name_map["R1"] = reginfo_t(RI_R1);
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reg_name_map["R2"] = reginfo_t(RI_R2);
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reg_name_map["R3"] = reginfo_t(RI_R3);
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reg_name_map["R4"] = reginfo_t(RI_R4);
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reg_name_map["R5"] = reginfo_t(RI_R5);
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reg_name_map["R6"] = reginfo_t(RI_R6);
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reg_name_map["R7"] = reginfo_t(RI_R7);
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reg_name_map["R8"] = reginfo_t(RI_R8);
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reg_name_map["R9"] = reginfo_t(RI_R9);
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reg_name_map["R10"] = reginfo_t(RI_R10);
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reg_name_map["R11"] = reginfo_t(RI_R11);
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reg_name_map["R12"] = reginfo_t(RI_R12);
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reg_name_map["SP"] = reginfo_t(RI_SP);
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reg_name_map["LR"] = reginfo_t(RI_LR);
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reg_name_map["PC"] = reginfo_t(RI_IP);
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const llvm::MCRegisterInfo ®_info = disas->getRegisterInfo();
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for (unsigned int i = 0; i < reg_info.getNumRegs(); ++i){
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std::string name = reg_info.getName(i);
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if (reg_name_map.count(name) > 0) {
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llvm_to_fail_map[i] = reg_name_map[name];
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}
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}
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}
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