0799e52fde
Internal LLVM register IDs can and did change between LLVM versions. These magic integers are replaced by iterating over all LLVM registers and mapping them to FAIL* registers by name. As this iteration requires a LLVM object created from a binary, a static convenience function is added to LLVMtoFailTranslator which creates a translator given the binary filename. Building this functionality inside libfail-llvmdisassembler prevents experiments from needing to add LLVM includes and library definitions. Change-Id: I27927f40d5cb6d9a22bb2caf21ca2450f6bcb0b8
69 lines
2.3 KiB
C++
69 lines
2.3 KiB
C++
#include "LLVMDisassembler.hpp"
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#include "LLVMtoFailBochs.hpp"
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#include "sal/x86/X86Architecture.hpp"
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using namespace fail;
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LLVMtoFailBochs::LLVMtoFailBochs(LLVMDisassembler *disas) {
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std::map<std::string, struct reginfo_t> reg_name_map;
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reg_name_map["AH"] = reginfo_t(RID_CAX, 8, 8);
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reg_name_map["AL"] = reginfo_t(RID_CAX, 8, 0);
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reg_name_map["AX"] = reginfo_t(RID_CAX, 16, 0);
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reg_name_map["EAX"] = reginfo_t(RID_CAX, 32, 0);
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reg_name_map["BH"] = reginfo_t(RID_CBX, 8, 8);
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reg_name_map["BL"] = reginfo_t(RID_CBX, 8, 0);
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reg_name_map["BX"] = reginfo_t(RID_CBX, 16, 0);
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reg_name_map["EBX"] = reginfo_t(RID_CBX, 32, 0);
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reg_name_map["CH"] = reginfo_t(RID_CCX, 8, 8);
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reg_name_map["CL"] = reginfo_t(RID_CCX, 8, 0);
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reg_name_map["CX"] = reginfo_t(RID_CCX, 16, 0);
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reg_name_map["ECX"] = reginfo_t(RID_CCX);
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reg_name_map["DH"] = reginfo_t(RID_CDX, 8, 8);
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reg_name_map["DL"] = reginfo_t(RID_CDX, 8, 0);
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reg_name_map["DX"] = reginfo_t(RID_CDX, 16, 0);
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reg_name_map["EDX"] = reginfo_t(RID_CDX);
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reg_name_map["DI"] = reginfo_t(RID_CDI, 16, 0);
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reg_name_map["DIL"] = reginfo_t(RID_CDI, 8, 0);
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reg_name_map["EDI"] = reginfo_t(RID_CDI);
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reg_name_map["BP"] = reginfo_t(RID_CBP, 16, 0);
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reg_name_map["BPL"] = reginfo_t(RID_CBP, 8, 0);
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reg_name_map["EBP"] = reginfo_t(RID_CBP);
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reg_name_map["EFLAGS"] = reginfo_t(RID_FLAGS);
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reg_name_map["EIP"] = reginfo_t(RID_PC);
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reg_name_map["SI"] = reginfo_t(RID_CSI, 16, 0);
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reg_name_map["ESI"] = reginfo_t(RID_CSI);
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reg_name_map["ESP"] = reginfo_t(RID_CSP);
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reg_name_map["SP"] = reginfo_t(RID_CSP, 16, 0);
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reg_name_map["SPL"] = reginfo_t(RID_CSP, 8, 0);
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reg_name_map["CR0"] = reginfo_t(RID_CR0);
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reg_name_map["CR2"] = reginfo_t(RID_CR2);
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reg_name_map["CR3"] = reginfo_t(RID_CR3);
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reg_name_map["CR4"] = reginfo_t(RID_CR4);
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reg_name_map["CS"] = reginfo_t(RID_CS, 16, 0);
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reg_name_map["DS"] = reginfo_t(RID_DS, 16, 0);
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reg_name_map["ES"] = reginfo_t(RID_ES, 16, 0);
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reg_name_map["FS"] = reginfo_t(RID_FS, 16, 0);
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reg_name_map["GS"] = reginfo_t(RID_GS, 16, 0);
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reg_name_map["SS"] = reginfo_t(RID_SS, 16, 0);
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const llvm::MCRegisterInfo ®_info = disas->getRegisterInfo();
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for (unsigned int i = 0; i < reg_info.getNumRegs(); ++i){
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std::string name = reg_info.getName(i);
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if (reg_name_map.count(name) > 0) {
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llvm_to_fail_map[i] = reg_name_map[name];
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}
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}
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}
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