2575604b41
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1321 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
157 lines
3.5 KiB
C
157 lines
3.5 KiB
C
/*
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* Copyright (c) 2005-2011 Imperas Software Ltd., www.imperas.com
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*
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* YOUR ACCESS TO THE INFORMATION IN THIS MODEL IS CONDITIONAL
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* UPON YOUR ACCEPTANCE THAT YOU WILL NOT USE OR PERMIT OTHERS
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* TO USE THE INFORMATION FOR THE PURPOSES OF DETERMINING WHETHER
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* IMPLEMENTATIONS OF THE ARM ARCHITECTURE INFRINGE ANY THIRD
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* PARTY PATENTS.
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*
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* THE LICENSE BELOW EXTENDS ONLY TO USE OF THE SOFTWARE FOR
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* MODELING PURPOSES AND SHALL NOT BE CONSTRUED AS GRANTING
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* A LICENSE TO CREATE A HARDWARE IMPLEMENTATION OF THE
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* FUNCTIONALITY OF THE SOFTWARE LICENSED HEREUNDER.
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* YOU MAY USE THE SOFTWARE SUBJECT TO THE LICENSE TERMS BELOW
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* PROVIDED THAT YOU ENSURE THAT THIS NOTICE IS REPLICATED UNMODIFIED
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* AND IN ITS ENTIRETY IN ALL DISTRIBUTIONS OF THE SOFTWARE,
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* MODIFIED OR UNMODIFIED, IN SOURCE CODE OR IN BINARY FORM.
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*
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* Licensed under an Imperas Modfied Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.ovpworld.org/licenses/OVP_MODIFIED_1.0_APACHE_OPEN_SOURCE_LICENSE_2.0.pdf
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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* either express or implied.
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*
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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*/
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#ifndef ARM_EXCEPTIONS_H
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#define ARM_EXCEPTIONS_H
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// VMI header files
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#include "vmi/vmiTypes.h"
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// model header files
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#include "armExceptionTypes.h"
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#include "armTypeRefs.h"
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//
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// Return the current execution priority
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//
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Int32 armGetExecutionPriority(armP arm);
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//
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// Refresh execution priority on any state change which affects it
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//
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void armRefreshExecutionPriority(armP arm);
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//
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// Refresh pending exception state on any state change which affects it
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//
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void armRefreshPendingException(armP arm);
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//
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// Refresh execution priority and pending exception state on any state change
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// which affects them
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//
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void armRefreshExecutionPriorityPendingException(armP arm);
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//
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// Derive value of ICSR.RETTOBASE
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//
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Bool armGetRetToBase(armP arm);
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//
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// Handle exception return
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//
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void armExceptionReturn(armP arm, Uns32 targetPC);
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//
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// Connect up processor interrupts
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//
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void armConnectInterrupts(armP arm);
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//
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// Do breakpoint exception
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//
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void armBKPT(armP arm, Uns32 thisPC);
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//
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// Do software exception
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//
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void armSWI(armP arm, Uns32 thisPC);
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//
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// Do UsageFault exception
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//
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void armUsageFault(armP arm, Uns32 thisPC);
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//
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// Do BusFault exception
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//
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void armBusFault(armP arm, Uns32 faultAddress, memPriv priv);
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//
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// Do data/prefetch abort exception
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//
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void armMemoryAbort(armP arm, Uns32 faultAddress, memPriv priv);
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//
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// Raise an exception
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//
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void armRaise(armP arm, armExceptNum num);
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//
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// Perform SEV instruction actions
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//
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void armSEV(armP arm);
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//
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// Read SYST_CVR register
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//
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Uns32 armReadSYST_CVR(armP arm);
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//
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// Write SYST_CVR register
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//
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void armWriteSYST_CVR(armP arm, Uns32 newValue);
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//
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// Read SYST_CSR register
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//
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Uns32 armReadSYST_CSR(armP arm);
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//
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// Write SYST_CSR register
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//
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void armWriteSYST_CSR(armP arm, Uns32 newValue);
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//
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// Write SYST_RVR register
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//
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void armWriteSYST_RVR(armP arm, Uns32 newValue);
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//
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// This is the ARM PreserveFPState primitive
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//
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void armPreserveFPState(armP arm);
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//
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// Create port specifications
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//
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void armNewPortSpecs(armP arm);
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//
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// Free port specifications
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//
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void armFreePortSpecs(armP arm);
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#endif
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