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32d882742c03e2f0b66da58907f5d311f61aa46b
fail/simulators/bochs/cpu
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unzner bff60aeae3 Additionally passing the current Bochs CPU context and instruction cache entry to BochsController (enables detailed instruction analysis and modification) 
git-svn-id: https://www4.informatik.uni-erlangen.de/i4svn/danceos/trunk/devel/fail@1361 8c4709b5-6ec9-48aa-a5cd-a96041d1645a
2012-06-15 16:39:14 +00:00
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3dnow.cc
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access32.cc
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access64.cc
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access.cc
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aes.cc
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apic.cc
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apic.h
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arith8.cc
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arith16.cc
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arith32.cc
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arith64.cc
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bcd.cc
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bit16.cc
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bit32.cc
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bit64.cc
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bit.cc
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call_far.cc
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cpu.cc
Additionally passing the current Bochs CPU context and instruction cache entry to BochsController (enables detailed instruction analysis and modification)
2012-06-15 16:39:14 +00:00
cpu.h
Fail* directories reorganized, Code-cleanup (-> coding-style), Typos+comments fixed.
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cpuid.cc
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crc32.cc
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crregs.cc
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crregs.h
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ctrl_xfer16.cc
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ctrl_xfer32.cc
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ctrl_xfer64.cc
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ctrl_xfer_pro.cc
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data_xfer8.cc
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data_xfer16.cc
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data_xfer32.cc
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data_xfer64.cc
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debugstuff.cc
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descriptor.h
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exception.cc
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fetchdecode64.cc
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fetchdecode_sse.h
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fetchdecode_x87.h
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fetchdecode.cc
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fetchdecode.h
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flag_ctrl_pro.cc
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flag_ctrl.cc
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fpu_emu.cc
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i387.h
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ia_opcodes.h
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icache.cc
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icache.h
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init.cc
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instr.h
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io.cc
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iret.cc
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jmp_far.cc
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lazy_flags.cc
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lazy_flags.h
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load.cc
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logical8.cc
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logical16.cc
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logical32.cc
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logical64.cc
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Makefile.in
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mmx.cc
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model_specific.h
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msr.cc
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mult8.cc
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mult16.cc
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mult32.cc
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mult64.cc
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paging.cc
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proc_ctrl.cc
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protect_ctrl.cc
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resolver.cc
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ret_far.cc
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segment_ctrl_pro.cc
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segment_ctrl.cc
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shift8.cc
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shift16.cc
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shift32.cc
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shift64.cc
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smm.cc
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smm.h
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soft_int.cc
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sse_move.cc
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sse_pfp.cc
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sse_rcp.cc
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sse_string.cc
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sse.cc
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stack16.cc
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stack32.cc
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stack64.cc
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stack.h
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string.cc
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tasking.cc
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todo
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vm8086.cc
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vmcs.cc
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vmexit.cc
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vmx.cc
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vmx.h
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xmm.h
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xsave.cc
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