e3c633c248
The import tool does support the following import strategies: - BasicImporter: generates def-use equivalence classes for read and write memory accesses - DCiAOKernelImporter: generates equivalence classes for read access in the ciao kernel space. Change-Id: I8960561d3e14dcf5dffa3ff7a59b61a5e8f7e719
125 lines
3.7 KiB
C++
125 lines
3.7 KiB
C++
#include <sstream>
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#include <iostream>
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#include "Importer.hpp"
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#include "util/Logger.hpp"
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using namespace fail;
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extern Logger log;
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void Importer::init(const std::string &variant, const std::string &benchmark, Database *db) {
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this->db = db;
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m_variant_id = db->get_variant_id(variant, benchmark);
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log << "Importing to variant " << variant << "/" << benchmark
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<< " (ID: " << m_variant_id << ")" << std::endl;
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}
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bool Importer::clear_database() {
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std::stringstream ss;
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ss << "DELETE FROM trace WHERE variant_id = " << m_variant_id;
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bool ret = db->query(ss.str().c_str()) == 0 ? false : true;
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log << "delted " << db->affected_rows() << " rows from trace table" << std::endl;
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return ret;
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}
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bool Importer::copy_to_database(fail::ProtoIStream &ps) {
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unsigned row_count = 0;
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// map for keeping one "open" EC for every address
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// (maps injection data address => equivalence class)
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AddrLastaccessMap open_ecs;
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// instruction counter within trace
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unsigned instr = 0;
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// "rightmost" instr where we did a FI experiment
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unsigned instr_rightmost = 0;
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Trace_Event ev;
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while (ps.getNext(&ev)) {
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// instruction events just get counted
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if (!ev.has_memaddr()) {
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// new instruction
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instr++;
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continue;
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}
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address_t from = ev.memaddr(), to = ev.memaddr() + ev.width();
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// Iterate over all accessed bytes
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for (address_t data_address = from; data_address < to; ++data_address) {
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int instr1 = open_ecs[data_address]; // defaults to 0 if nonexistent
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int instr2 = instr; // the current instruction
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// skip zero-sized intervals: these can occur when an instruction
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// accesses a memory location more than once (e.g., INC, CMPXCHG)
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if (instr1 > instr2) {
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continue;
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}
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ev.set_width(1);
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ev.set_memaddr(data_address);
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// we now have an interval-terminating R/W event to the memaddr
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// we're currently looking at; the EC is defined by
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// data_address [instr1, instr2] (instr_absolute)
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if (!add_trace_event(instr1, instr2, ev)) {
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log << "add_trace_event failed" << std::endl;
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return false;
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}
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row_count ++;
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if (row_count % 1000 == 0) {
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log << "Imported " << row_count << " traces into the database" << std::endl;
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}
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if (ev.accesstype() == ev.READ) {
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// FIXME this is broken: we must abort after the rightmost R
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// and must not allow Ws to find their way into the known
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// results
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instr_rightmost = instr2;
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}
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// next interval must start at next instruction; the aforementioned
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// skipping mechanism wouldn't work otherwise
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//lastuse_it->second = instr2 + 1;
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open_ecs[data_address] = instr2 + 1;
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}
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}
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log << "Inserted " << row_count << " traces into the database" << std::endl;
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// FIXME
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// close all open intervals (right end of the fault-space) with fake trace event
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// for (AddrLastaccessMap::iterator lastuse_it = open_ecs.begin();
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// lastuse_it != open_ecs.end(); ++lastuse_it) {
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// address_t data_address = lastuse_it->first;
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// int instr1 = lastuse_it->second;
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// #if 0
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// // Why -1? In most cases it does not make sense to inject before the
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// // very last instruction, as we won't execute it anymore. This *only*
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// // makes sense if we also inject into parts of the result vector. This
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// // is not the case in this experiment, and with -1 we'll get a result
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// // comparable to the non-pruned campaign.
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// int instr2 = instr - 1;
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// #else
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// // EcosKernelTestCampaign only variant: fault space ends with the last FI experiment
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// int instr2 = instr_rightmost;
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// #endif
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// // zero-sized? skip.
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// if (instr1 > instr2) {
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// continue;
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// }
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// add_trace_event(variant_id, instr1, instr2,
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// data_address, 1, 'W', 0,
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// 0, 0, 0, 0, 0, true);
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// }
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// fsp.fini();
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return true;
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}
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